Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	48976419	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

47693108

1

T1

199

T2

104435

T3

20750

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	53981631	1			T1	86		T2	142094		T3	23012
values[0x0]	20701864	1			T1	74		T2	29674		T3	5954
values[0x1]	21986032	1			T1	63		T2	32133		T3	6148

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	37577253	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

59092274

1

T1

203

T2

130129

T3

24113

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	309566	1			T2	830		T3	166		T8	147
valid_sources[0x01]	310071	1			T1	3		T2	737		T3	125
valid_sources[0x02]	310107	1			T1	3		T2	797		T3	138
valid_sources[0x03]	310608	1			T1	2		T2	856		T3	147
valid_sources[0x04]	346983	1			T2	789		T3	149		T7	2
valid_sources[0x05]	310490	1			T2	783		T3	157		T8	150
valid_sources[0x06]	307447	1			T1	1		T2	732		T3	150
valid_sources[0x07]	311584	1			T1	1		T2	807		T3	138
valid_sources[0x08]	307676	1			T1	4		T2	779		T3	140
valid_sources[0x09]	950127	1			T1	1		T2	764		T3	138
valid_sources[0x0a]	307505	1			T2	824		T3	141		T8	107
valid_sources[0x0b]	399389	1			T2	848		T3	117		T7	1
valid_sources[0x0c]	304917	1			T1	1		T2	797		T3	149
valid_sources[0x0d]	414432	1			T1	3		T2	752		T3	147
valid_sources[0x0e]	312890	1			T2	819		T3	157		T8	116
valid_sources[0x0f]	458748	1			T1	1		T2	768		T3	143
valid_sources[0x10]	391293	1			T1	1		T2	838		T3	142
valid_sources[0x11]	365018	1			T1	1		T2	769		T3	140
valid_sources[0x12]	309318	1			T2	862		T3	135		T8	133
valid_sources[0x13]	312889	1			T1	1		T2	804		T3	133
valid_sources[0x14]	453686	1			T2	779		T3	159		T8	155
valid_sources[0x15]	317950	1			T1	3		T2	814		T3	157
valid_sources[0x16]	320303	1			T1	1		T2	832		T3	118
valid_sources[0x17]	736674	1			T1	2		T2	795		T3	124
valid_sources[0x18]	311068	1			T1	1		T2	781		T3	126
valid_sources[0x19]	310527	1			T2	820		T3	108		T8	122
valid_sources[0x1a]	479766	1			T1	1		T2	786		T3	124
valid_sources[0x1b]	311323	1			T1	2		T2	785		T3	124
valid_sources[0x1c]	578575	1			T2	741		T3	123		T7	1
valid_sources[0x1d]	310556	1			T2	769		T3	137		T8	142
valid_sources[0x1e]	308115	1			T2	775		T3	135		T8	145
valid_sources[0x1f]	307997	1			T1	4		T2	751		T3	122
valid_sources[0x20]	308601	1			T1	2		T2	740		T3	139
valid_sources[0x21]	314276	1			T2	807		T3	147		T8	146
valid_sources[0x22]	584891	1			T1	3		T2	853		T3	124
valid_sources[0x23]	307884	1			T2	841		T3	127		T7	1
valid_sources[0x24]	307495	1			T2	797		T3	127		T8	140
valid_sources[0x25]	815737	1			T2	826		T3	124		T8	136
valid_sources[0x26]	313013	1			T2	738		T3	120		T7	1
valid_sources[0x27]	309723	1			T2	856		T3	149		T7	1
valid_sources[0x28]	308450	1			T1	1		T2	788		T3	136
valid_sources[0x29]	311697	1			T2	847		T3	152		T8	129
valid_sources[0x2a]	310273	1			T2	811		T3	129		T8	133
valid_sources[0x2b]	306958	1			T2	864		T3	120		T7	3
valid_sources[0x2c]	331918	1			T1	1		T2	857		T3	129
valid_sources[0x2d]	306839	1			T1	1		T2	808		T3	134
valid_sources[0x2e]	308483	1			T2	792		T3	137		T8	140
valid_sources[0x2f]	396903	1			T2	762		T3	136		T8	144
valid_sources[0x30]	572267	1			T1	1		T2	725		T3	117
valid_sources[0x31]	963014	1			T2	807		T3	123		T8	133
valid_sources[0x32]	307834	1			T1	2		T2	864		T3	135
valid_sources[0x33]	310408	1			T1	2		T2	836		T3	145
valid_sources[0x34]	309171	1			T2	771		T3	159		T7	1
valid_sources[0x35]	307495	1			T2	850		T3	122		T7	1
valid_sources[0x36]	380091	1			T1	1		T2	762		T3	93
valid_sources[0x37]	379568	1			T1	2		T2	752		T3	135
valid_sources[0x38]	618937	1			T1	2		T2	850		T3	141
valid_sources[0x39]	328160	1			T2	748		T3	155		T8	135
valid_sources[0x3a]	438389	1			T2	800		T3	141		T7	1
valid_sources[0x3b]	435599	1			T2	831		T3	123		T8	122
valid_sources[0x3c]	308610	1			T2	881		T3	160		T7	1
valid_sources[0x3d]	530880	1			T1	1		T2	792		T3	135
valid_sources[0x3e]	466778	1			T1	2		T2	803		T3	137
valid_sources[0x3f]	370738	1			T2	731		T3	129		T8	167
valid_sources[0x40]	455792	1			T2	840		T3	137		T7	1
valid_sources[0x41]	307544	1			T1	1		T2	752		T3	149
valid_sources[0x42]	309156	1			T1	1		T2	796		T3	105
valid_sources[0x43]	309389	1			T1	2		T2	794		T3	122
valid_sources[0x44]	325690	1			T2	762		T3	135		T8	152
valid_sources[0x45]	306924	1			T1	2		T2	837		T3	128
valid_sources[0x46]	310806	1			T2	774		T3	139		T8	132
valid_sources[0x47]	441654	1			T2	803		T3	153		T8	143
valid_sources[0x48]	322427	1			T1	1		T2	815		T3	130
valid_sources[0x49]	333569	1			T2	804		T3	154		T8	117
valid_sources[0x4a]	307279	1			T2	759		T3	135		T7	2
valid_sources[0x4b]	306860	1			T2	788		T3	137		T8	145
valid_sources[0x4c]	311630	1			T1	3		T2	745		T3	101
valid_sources[0x4d]	309520	1			T2	831		T3	126		T7	1
valid_sources[0x4e]	313065	1			T1	1		T2	815		T3	121
valid_sources[0x4f]	479530	1			T1	1		T2	862		T3	137
valid_sources[0x50]	309754	1			T1	1		T2	794		T3	151
valid_sources[0x51]	311496	1			T2	842		T3	117		T8	144
valid_sources[0x52]	311421	1			T1	2		T2	777		T3	152
valid_sources[0x53]	308970	1			T1	1		T2	745		T3	102
valid_sources[0x54]	350935	1			T1	1		T2	851		T3	155
valid_sources[0x55]	307761	1			T1	1		T2	787		T3	147
valid_sources[0x56]	369925	1			T1	1		T2	854		T3	143
valid_sources[0x57]	310777	1			T1	1		T2	831		T3	134
valid_sources[0x58]	341967	1			T2	790		T3	153		T8	140
valid_sources[0x59]	313024	1			T1	1		T2	850		T3	140
valid_sources[0x5a]	311885	1			T1	2		T2	809		T3	136
valid_sources[0x5b]	304806	1			T1	2		T2	772		T3	141
valid_sources[0x5c]	306795	1			T2	816		T3	121		T8	141
valid_sources[0x5d]	360377	1			T1	1		T2	786		T3	160
valid_sources[0x5e]	309229	1			T1	4		T2	832		T3	156
valid_sources[0x5f]	316835	1			T2	820		T3	113		T7	1
valid_sources[0x60]	309178	1			T2	754		T3	113		T7	1
valid_sources[0x61]	317019	1			T1	3		T2	815		T3	155
valid_sources[0x62]	307268	1			T2	850		T3	154		T8	135
valid_sources[0x63]	308705	1			T2	755		T3	148		T7	1
valid_sources[0x64]	309788	1			T1	2		T2	775		T3	120
valid_sources[0x65]	310634	1			T2	830		T3	116		T8	153
valid_sources[0x66]	354180	1			T2	741		T3	153		T8	163
valid_sources[0x67]	313268	1			T2	802		T3	109		T8	157
valid_sources[0x68]	442748	1			T1	1		T2	844		T3	144
valid_sources[0x69]	311791	1			T1	2		T2	826		T3	140
valid_sources[0x6a]	310623	1			T2	766		T3	112		T8	125
valid_sources[0x6b]	319338	1			T2	807		T3	154		T8	120
valid_sources[0x6c]	309727	1			T2	763		T3	158		T8	133
valid_sources[0x6d]	307150	1			T2	826		T3	158		T7	4
valid_sources[0x6e]	306077	1			T2	826		T3	111		T8	124
valid_sources[0x6f]	308179	1			T2	834		T3	108		T7	2
valid_sources[0x70]	308903	1			T1	1		T2	793		T3	138
valid_sources[0x71]	309541	1			T1	2		T2	783		T3	98
valid_sources[0x72]	312916	1			T1	1		T2	792		T3	134
valid_sources[0x73]	309192	1			T2	821		T3	153		T7	4
valid_sources[0x74]	307995	1			T2	827		T3	128		T8	140
valid_sources[0x75]	308290	1			T1	1		T2	749		T3	171
valid_sources[0x76]	509155	1			T1	1		T2	787		T3	140
valid_sources[0x77]	312295	1			T1	1		T2	861		T3	160
valid_sources[0x78]	308209	1			T2	786		T3	157		T8	142
valid_sources[0x79]	308722	1			T2	787		T3	130		T7	3
valid_sources[0x7a]	307999	1			T2	756		T3	130		T8	150
valid_sources[0x7b]	310507	1			T2	789		T3	128		T8	128
valid_sources[0x7c]	308307	1			T1	4		T2	729		T3	133
valid_sources[0x7d]	474864	1			T2	816		T3	145		T7	3
valid_sources[0x7e]	314994	1			T2	794		T3	106		T8	144
valid_sources[0x7f]	343291	1			T1	2		T2	750		T3	130
valid_sources[0x80]	483234	1			T1	1		T2	843		T3	121

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

20757385

1

T1

74

T2

69495

T3

14094

values[0x0]

all_enables

biggest_size

14127275

1

T1

69

T2

18448

T3

3660

values[0x1]

all_enables

biggest_size

12808448

1

T1

56

T2

16492

T3

2996