Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	42310606	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

43122486

1

T1

5

T2

203

T3

29291

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	47508450	1			T1	1		T2	78		T3	32845
values[0x0]	18402664	1			T1	10		T2	78		T3	8325
values[0x1]	19521978	1			T1	13		T2	63		T3	8899

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	32470282	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

52962810

1

T1

6

T2

206

T3

34035

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	318375	1			T2	2		T3	178		T16	3029
valid_sources[0x01]	311825	1			T2	1		T3	189		T16	3287
valid_sources[0x02]	437032	1			T3	194		T16	3168		T7	69
valid_sources[0x03]	273482	1			T3	217		T16	3251		T7	28
valid_sources[0x04]	268007	1			T2	1		T3	207		T16	3206
valid_sources[0x05]	320431	1			T3	184		T16	3238		T7	49
valid_sources[0x06]	382186	1			T3	192		T16	3320		T7	106
valid_sources[0x07]	297228	1			T3	188		T16	3336		T7	24
valid_sources[0x08]	271550	1			T2	1		T3	215		T16	3275
valid_sources[0x09]	272456	1			T3	195		T16	3272		T7	45
valid_sources[0x0a]	1126059	1			T3	195		T16	3104		T7	75
valid_sources[0x0b]	273889	1			T2	3		T3	190		T16	3285
valid_sources[0x0c]	296973	1			T3	212		T16	3170		T7	34
valid_sources[0x0d]	345238	1			T3	167		T16	3162		T7	52
valid_sources[0x0e]	317525	1			T3	218		T16	3229		T7	30
valid_sources[0x0f]	468808	1			T2	1		T3	167		T16	3310
valid_sources[0x10]	319029	1			T3	189		T16	3169		T7	44
valid_sources[0x11]	273335	1			T3	202		T16	3342		T7	57
valid_sources[0x12]	274373	1			T3	219		T16	3144		T7	7
valid_sources[0x13]	271324	1			T3	189		T16	3251		T7	37
valid_sources[0x14]	272639	1			T3	194		T16	3386		T7	47
valid_sources[0x15]	273517	1			T1	1		T3	195		T16	3217
valid_sources[0x16]	272737	1			T3	200		T16	3136		T7	62
valid_sources[0x17]	271032	1			T2	1		T3	203		T16	3055
valid_sources[0x18]	272968	1			T3	197		T16	3323		T7	28
valid_sources[0x19]	291324	1			T2	5		T3	188		T16	3288
valid_sources[0x1a]	275620	1			T2	2		T3	184		T16	3260
valid_sources[0x1b]	270597	1			T3	195		T16	3304		T7	46
valid_sources[0x1c]	270716	1			T3	193		T16	3310		T7	77
valid_sources[0x1d]	336051	1			T1	1		T2	3		T3	186
valid_sources[0x1e]	702511	1			T2	1		T3	199		T16	3231
valid_sources[0x1f]	433956	1			T1	1		T2	4		T3	203
valid_sources[0x20]	605419	1			T3	203		T16	3326		T7	33
valid_sources[0x21]	275465	1			T3	198		T16	3318		T7	91
valid_sources[0x22]	1139723	1			T3	224		T16	3404		T7	41
valid_sources[0x23]	546811	1			T1	1		T3	214		T16	3340
valid_sources[0x24]	270521	1			T2	2		T3	185		T16	3342
valid_sources[0x25]	500278	1			T2	2		T3	175		T16	3144
valid_sources[0x26]	273604	1			T3	202		T16	3217		T7	58
valid_sources[0x27]	271804	1			T3	182		T16	3229		T7	75
valid_sources[0x28]	429020	1			T3	165		T16	3294		T7	48
valid_sources[0x29]	270710	1			T3	218		T16	3237		T7	5
valid_sources[0x2a]	271608	1			T3	182		T16	3371		T7	58
valid_sources[0x2b]	274124	1			T3	200		T16	3328		T7	55
valid_sources[0x2c]	347600	1			T3	185		T16	3333		T7	47
valid_sources[0x2d]	272141	1			T3	180		T16	3321		T7	16
valid_sources[0x2e]	273989	1			T3	186		T16	3229		T7	66
valid_sources[0x2f]	274028	1			T2	1		T3	220		T16	3285
valid_sources[0x30]	273891	1			T3	202		T16	3354		T7	61
valid_sources[0x31]	273088	1			T1	1		T3	196		T16	3335
valid_sources[0x32]	307332	1			T2	1		T3	212		T16	3374
valid_sources[0x33]	275060	1			T2	1		T3	208		T16	3158
valid_sources[0x34]	273985	1			T2	3		T3	209		T16	3192
valid_sources[0x35]	1186936	1			T3	175		T16	3425		T7	29
valid_sources[0x36]	370801	1			T3	188		T16	3255		T7	45
valid_sources[0x37]	275241	1			T3	189		T16	3084		T7	60
valid_sources[0x38]	276024	1			T3	180		T16	3189		T7	41
valid_sources[0x39]	269061	1			T3	214		T16	3250		T7	47
valid_sources[0x3a]	270848	1			T3	196		T16	3267		T7	97
valid_sources[0x3b]	274064	1			T2	2		T3	191		T16	3358
valid_sources[0x3c]	269850	1			T3	177		T16	3405		T7	28
valid_sources[0x3d]	272761	1			T3	208		T16	3271		T7	42
valid_sources[0x3e]	297961	1			T3	193		T16	3364		T7	52
valid_sources[0x3f]	274398	1			T1	2		T3	198		T16	3166
valid_sources[0x40]	273840	1			T3	223		T16	3108		T7	74
valid_sources[0x41]	269218	1			T3	219		T16	3395		T7	60
valid_sources[0x42]	273651	1			T3	191		T16	3305		T7	12
valid_sources[0x43]	273680	1			T3	213		T16	3438		T7	23
valid_sources[0x44]	270506	1			T3	181		T16	3337		T7	98
valid_sources[0x45]	307639	1			T3	211		T16	3298		T7	48
valid_sources[0x46]	274671	1			T3	174		T16	3436		T7	62
valid_sources[0x47]	272931	1			T1	1		T2	2		T3	220
valid_sources[0x48]	272840	1			T3	205		T16	3070		T7	27
valid_sources[0x49]	273524	1			T3	188		T16	3379		T7	97
valid_sources[0x4a]	274885	1			T3	192		T16	3381		T7	55
valid_sources[0x4b]	274892	1			T2	2		T3	179		T16	3190
valid_sources[0x4c]	272197	1			T3	167		T16	3255		T7	45
valid_sources[0x4d]	276809	1			T3	201		T16	3174		T7	77
valid_sources[0x4e]	271603	1			T3	218		T16	3179		T7	57
valid_sources[0x4f]	270410	1			T3	198		T16	3326		T7	38
valid_sources[0x50]	379311	1			T3	206		T16	3319		T7	53
valid_sources[0x51]	270660	1			T3	214		T16	3212		T7	28
valid_sources[0x52]	272995	1			T3	174		T16	3105		T7	47
valid_sources[0x53]	375379	1			T3	189		T16	3323		T7	35
valid_sources[0x54]	404436	1			T3	201		T16	3208		T7	41
valid_sources[0x55]	273767	1			T1	2		T3	187		T16	3189
valid_sources[0x56]	621379	1			T3	225		T16	3249		T7	59
valid_sources[0x57]	416485	1			T1	1		T2	4		T3	186
valid_sources[0x58]	272821	1			T3	182		T16	3315		T7	45
valid_sources[0x59]	272853	1			T3	198		T16	3398		T7	78
valid_sources[0x5a]	272979	1			T2	1		T3	171		T16	3161
valid_sources[0x5b]	441803	1			T2	2		T3	198		T16	3220
valid_sources[0x5c]	289510	1			T2	1		T3	211		T16	3262
valid_sources[0x5d]	273184	1			T3	218		T16	3250		T7	32
valid_sources[0x5e]	271355	1			T1	1		T3	190		T16	3275
valid_sources[0x5f]	274203	1			T3	205		T16	3243		T7	87
valid_sources[0x60]	272361	1			T3	191		T16	3294		T7	29
valid_sources[0x61]	361671	1			T3	180		T16	3325		T7	74
valid_sources[0x62]	270842	1			T2	1		T3	198		T16	3260
valid_sources[0x63]	267931	1			T3	191		T16	3237		T7	16
valid_sources[0x64]	268724	1			T3	189		T16	3285		T7	43
valid_sources[0x65]	381113	1			T3	206		T16	3236		T7	124
valid_sources[0x66]	270465	1			T3	196		T16	3284		T7	32
valid_sources[0x67]	275585	1			T3	164		T16	3164		T7	20
valid_sources[0x68]	269659	1			T3	205		T16	3386		T7	70
valid_sources[0x69]	270189	1			T2	1		T3	197		T16	3208
valid_sources[0x6a]	274163	1			T3	202		T16	3229		T7	39
valid_sources[0x6b]	273377	1			T1	1		T3	186		T16	3259
valid_sources[0x6c]	275141	1			T2	3		T3	200		T16	3269
valid_sources[0x6d]	274464	1			T3	186		T16	3365		T7	48
valid_sources[0x6e]	370339	1			T3	211		T16	3549		T7	46
valid_sources[0x6f]	270657	1			T2	1		T3	205		T16	3352
valid_sources[0x70]	283992	1			T3	182		T16	3167		T7	88
valid_sources[0x71]	270816	1			T1	1		T3	211		T16	3212
valid_sources[0x72]	300274	1			T3	192		T16	3355		T7	9
valid_sources[0x73]	269456	1			T1	1		T3	168		T16	3254
valid_sources[0x74]	317200	1			T3	205		T16	3240		T7	33
valid_sources[0x75]	275211	1			T3	198		T16	3260		T7	40
valid_sources[0x76]	390127	1			T3	179		T16	3141		T7	22
valid_sources[0x77]	277125	1			T3	217		T16	3253		T7	61
valid_sources[0x78]	270673	1			T3	204		T16	3175		T7	83
valid_sources[0x79]	277100	1			T3	197		T16	3254		T7	118
valid_sources[0x7a]	270962	1			T2	3		T3	192		T16	3038
valid_sources[0x7b]	271852	1			T2	1		T3	210		T16	3253
valid_sources[0x7c]	272404	1			T3	219		T16	3196		T7	51
valid_sources[0x7d]	275158	1			T1	1		T2	2		T3	207
valid_sources[0x7e]	703986	1			T1	1		T2	5		T3	189
valid_sources[0x7f]	271494	1			T3	173		T16	3304		T7	54
valid_sources[0x80]	275051	1			T3	174		T16	3226		T7	29

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

18996397

1

T1

1

T2

71

T3

19430

values[0x0]

all_enables

biggest_size

12639116

1

T1

3

T2

74

T3

5273

values[0x1]

all_enables

biggest_size

11486973

1

T1

1

T2

58

T3

4588