Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174358 |
1 |
|
|
T2 |
64 |
|
T7 |
204 |
|
T8 |
660 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
96689 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
54732 |
1 |
|
|
T2 |
62 |
|
T7 |
5 |
|
T8 |
649 |
seven_bytes |
3199 |
1 |
|
|
T7 |
6 |
|
T15 |
45 |
|
T20 |
109 |
six_bytes |
3237 |
1 |
|
|
T7 |
4 |
|
T15 |
61 |
|
T20 |
89 |
five_bytes |
3273 |
1 |
|
|
T7 |
7 |
|
T15 |
43 |
|
T20 |
97 |
four_bytes |
3302 |
1 |
|
|
T7 |
6 |
|
T15 |
53 |
|
T20 |
112 |
three_bytes |
3406 |
1 |
|
|
T7 |
5 |
|
T15 |
53 |
|
T20 |
107 |
two_bytes |
3313 |
1 |
|
|
T7 |
6 |
|
T15 |
48 |
|
T20 |
119 |
one_byte |
3207 |
1 |
|
|
T7 |
7 |
|
T15 |
60 |
|
T20 |
82 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
171138 |
1 |
|
|
T2 |
60 |
|
T7 |
202 |
|
T8 |
638 |
auto[1] |
3220 |
1 |
|
|
T2 |
4 |
|
T7 |
2 |
|
T8 |
22 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174358 |
1 |
|
|
T2 |
64 |
|
T7 |
204 |
|
T8 |
660 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174353 |
1 |
|
|
T2 |
64 |
|
T7 |
204 |
|
T8 |
660 |
auto[1] |
5 |
1 |
|
|
T19 |
1 |
|
T168 |
1 |
|
T169 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1058 |
1 |
|
|
T2 |
2 |
|
T8 |
11 |
|
T15 |
3 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3220 |
1 |
|
|
T2 |
4 |
|
T7 |
2 |
|
T8 |
22 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
173790 |
1 |
|
|
T2 |
91 |
|
T8 |
602 |
|
T15 |
2975 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
96889 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
53966 |
1 |
|
|
T2 |
90 |
|
T8 |
592 |
|
T15 |
100 |
seven_bytes |
3373 |
1 |
|
|
T15 |
89 |
|
T20 |
55 |
|
T21 |
15 |
six_bytes |
3196 |
1 |
|
|
T15 |
76 |
|
T20 |
60 |
|
T21 |
14 |
five_bytes |
3286 |
1 |
|
|
T15 |
76 |
|
T20 |
55 |
|
T21 |
14 |
four_bytes |
3308 |
1 |
|
|
T15 |
81 |
|
T20 |
56 |
|
T21 |
15 |
three_bytes |
3249 |
1 |
|
|
T15 |
70 |
|
T20 |
58 |
|
T21 |
12 |
two_bytes |
3313 |
1 |
|
|
T15 |
74 |
|
T20 |
60 |
|
T21 |
12 |
one_byte |
3210 |
1 |
|
|
T15 |
76 |
|
T20 |
47 |
|
T21 |
19 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
170654 |
1 |
|
|
T2 |
89 |
|
T8 |
582 |
|
T15 |
2941 |
auto[1] |
3136 |
1 |
|
|
T2 |
2 |
|
T8 |
20 |
|
T15 |
34 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
173790 |
1 |
|
|
T2 |
91 |
|
T8 |
602 |
|
T15 |
2975 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
173776 |
1 |
|
|
T2 |
91 |
|
T8 |
602 |
|
T15 |
2975 |
auto[1] |
14 |
1 |
|
|
T170 |
1 |
|
T55 |
1 |
|
T171 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1033 |
1 |
|
|
T2 |
1 |
|
T8 |
10 |
|
T15 |
9 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3136 |
1 |
|
|
T2 |
2 |
|
T8 |
20 |
|
T15 |
34 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
340729 |
1 |
|
|
T2 |
4 |
|
T7 |
21 |
|
T8 |
942 |
auto[1] |
399 |
1 |
|
|
T9 |
18 |
|
T10 |
89 |
|
T11 |
30 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
184711 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
112431 |
1 |
|
|
T2 |
3 |
|
T7 |
1 |
|
T8 |
929 |
seven_bytes |
6288 |
1 |
|
|
T15 |
117 |
|
T20 |
137 |
|
T21 |
62 |
six_bytes |
6137 |
1 |
|
|
T15 |
99 |
|
T20 |
106 |
|
T21 |
55 |
five_bytes |
6358 |
1 |
|
|
T15 |
110 |
|
T20 |
131 |
|
T21 |
48 |
four_bytes |
6381 |
1 |
|
|
T7 |
1 |
|
T15 |
111 |
|
T20 |
110 |
three_bytes |
6238 |
1 |
|
|
T15 |
122 |
|
T20 |
135 |
|
T21 |
42 |
two_bytes |
6254 |
1 |
|
|
T15 |
111 |
|
T20 |
119 |
|
T21 |
54 |
one_byte |
6330 |
1 |
|
|
T15 |
144 |
|
T20 |
118 |
|
T21 |
56 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
334763 |
1 |
|
|
T2 |
2 |
|
T7 |
19 |
|
T8 |
916 |
auto[1] |
6365 |
1 |
|
|
T2 |
2 |
|
T7 |
2 |
|
T8 |
26 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
341128 |
1 |
|
|
T2 |
4 |
|
T7 |
21 |
|
T8 |
942 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
341101 |
1 |
|
|
T2 |
4 |
|
T7 |
21 |
|
T8 |
941 |
auto[1] |
27 |
1 |
|
|
T8 |
1 |
|
T20 |
1 |
|
T61 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2126 |
1 |
|
|
T2 |
1 |
|
T8 |
13 |
|
T15 |
8 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6365 |
1 |
|
|
T2 |
2 |
|
T7 |
2 |
|
T8 |
26 |