Summary for Variable entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
49946 |
1 |
|
|
T1 |
70 |
|
T2 |
188 |
|
T36 |
2 |
auto[1] |
51386 |
1 |
|
|
T36 |
284 |
|
T37 |
198 |
|
T38 |
34 |
Summary for Variable prescaler_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for prescaler_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
24969 |
1 |
|
|
T1 |
14 |
|
T2 |
46 |
|
T36 |
76 |
lower_val |
25116 |
1 |
|
|
T1 |
23 |
|
T2 |
50 |
|
T36 |
74 |
zero_val |
831 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T36 |
1 |
Summary for Variable wait_timer_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for wait_timer_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
37658 |
1 |
|
|
T1 |
38 |
|
T2 |
78 |
|
T36 |
70 |
lower_val |
37768 |
1 |
|
|
T1 |
32 |
|
T2 |
110 |
|
T36 |
68 |
zero_val |
25906 |
1 |
|
|
T36 |
148 |
|
T37 |
90 |
|
T38 |
12 |
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
18 |
0 |
18 |
100.00 |
|
Automatically Generated Cross Bins for entropy_timer_cross
Bins
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
higher_val |
auto[0] |
6023 |
1 |
|
|
T1 |
8 |
|
T2 |
22 |
|
T36 |
1 |
higher_val |
higher_val |
auto[1] |
3169 |
1 |
|
|
T36 |
21 |
|
T37 |
9 |
|
T38 |
1 |
higher_val |
lower_val |
auto[0] |
6156 |
1 |
|
|
T1 |
6 |
|
T2 |
24 |
|
T39 |
16 |
higher_val |
lower_val |
auto[1] |
3220 |
1 |
|
|
T36 |
16 |
|
T37 |
14 |
|
T38 |
1 |
higher_val |
zero_val |
auto[0] |
56 |
1 |
|
|
T17 |
1 |
|
T50 |
1 |
|
T193 |
1 |
higher_val |
zero_val |
auto[1] |
6345 |
1 |
|
|
T36 |
38 |
|
T37 |
31 |
|
T38 |
1 |
lower_val |
higher_val |
auto[0] |
6072 |
1 |
|
|
T1 |
12 |
|
T2 |
20 |
|
T39 |
19 |
lower_val |
higher_val |
auto[1] |
3107 |
1 |
|
|
T36 |
17 |
|
T37 |
21 |
|
T38 |
3 |
lower_val |
lower_val |
auto[0] |
6231 |
1 |
|
|
T1 |
11 |
|
T2 |
30 |
|
T7 |
1 |
lower_val |
lower_val |
auto[1] |
3245 |
1 |
|
|
T36 |
17 |
|
T37 |
15 |
|
T38 |
3 |
lower_val |
zero_val |
auto[0] |
47 |
1 |
|
|
T22 |
1 |
|
T45 |
1 |
|
T83 |
1 |
lower_val |
zero_val |
auto[1] |
6414 |
1 |
|
|
T36 |
40 |
|
T37 |
26 |
|
T38 |
6 |
zero_val |
higher_val |
auto[0] |
280 |
1 |
|
|
T2 |
1 |
|
T36 |
1 |
|
T8 |
1 |
zero_val |
higher_val |
auto[1] |
58 |
1 |
|
|
T186 |
1 |
|
T194 |
1 |
|
T147 |
1 |
zero_val |
lower_val |
auto[0] |
241 |
1 |
|
|
T1 |
1 |
|
T7 |
1 |
|
T38 |
1 |
zero_val |
lower_val |
auto[1] |
61 |
1 |
|
|
T195 |
2 |
|
T147 |
2 |
|
T15 |
4 |
zero_val |
zero_val |
auto[0] |
149 |
1 |
|
|
T37 |
1 |
|
T22 |
1 |
|
T45 |
1 |
zero_val |
zero_val |
auto[1] |
42 |
1 |
|
|
T83 |
2 |
|
T194 |
3 |
|
T196 |
2 |