Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 393 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 2479 1 T2 31 T37 15 T38 5
len_5001_7500 5790 1 T2 47 T37 15 T38 8
len_2501_5000 1396 1 T2 7 T37 15 T38 1
len_1025_2500 865 1 T2 2 T37 8 T38 1
len_769_1024 5001 1 T1 8 T2 1 T37 2
len_513_768 5599 1 T1 5 T2 1 T37 1
len_257_512 5552 1 T1 3 T37 2 T8 1
len_0_256 16830 1 T1 8 T2 5 T36 143
len_keccak_block_sizes[72] 30 1 T68 1 T197 1 T111 1
len_keccak_block_sizes[104] 35 1 T40 1 T68 2 T197 1
len_keccak_block_sizes[136] 31 1 T20 1 T197 1 T198 1
len_keccak_block_sizes[144] 18 1 T43 1 T196 1 T199 1
len_keccak_block_sizes[168] 23 1 T40 1 T200 1 T161 1
len_1 57 1 T36 1 T39 1 T45 1
len_0 442 1 T2 3 T36 7 T39 2

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