Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
166677 |
1 |
|
|
T3 |
20 |
|
T7 |
759 |
|
T8 |
780 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
83203 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
63525 |
1 |
|
|
T3 |
19 |
|
T7 |
22 |
|
T8 |
769 |
seven_bytes |
2913 |
1 |
|
|
T7 |
26 |
|
T15 |
21 |
|
T20 |
32 |
six_bytes |
2812 |
1 |
|
|
T7 |
24 |
|
T15 |
33 |
|
T20 |
25 |
five_bytes |
2794 |
1 |
|
|
T7 |
17 |
|
T15 |
31 |
|
T20 |
29 |
four_bytes |
2992 |
1 |
|
|
T7 |
24 |
|
T15 |
25 |
|
T20 |
38 |
three_bytes |
2772 |
1 |
|
|
T7 |
14 |
|
T15 |
35 |
|
T20 |
28 |
two_bytes |
2778 |
1 |
|
|
T7 |
11 |
|
T15 |
31 |
|
T20 |
34 |
one_byte |
2888 |
1 |
|
|
T7 |
15 |
|
T15 |
43 |
|
T20 |
44 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
163351 |
1 |
|
|
T3 |
18 |
|
T7 |
751 |
|
T8 |
758 |
auto[1] |
3326 |
1 |
|
|
T3 |
2 |
|
T7 |
8 |
|
T8 |
22 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
166677 |
1 |
|
|
T3 |
20 |
|
T7 |
759 |
|
T8 |
780 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
166666 |
1 |
|
|
T3 |
20 |
|
T7 |
759 |
|
T8 |
780 |
auto[1] |
11 |
1 |
|
|
T163 |
1 |
|
T79 |
1 |
|
T164 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1199 |
1 |
|
|
T3 |
1 |
|
T8 |
11 |
|
T15 |
3 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3326 |
1 |
|
|
T3 |
2 |
|
T7 |
8 |
|
T8 |
22 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
182181 |
1 |
|
|
T7 |
649 |
|
T8 |
1223 |
|
T15 |
1629 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
94584 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
64965 |
1 |
|
|
T7 |
15 |
|
T8 |
1202 |
|
T15 |
305 |
seven_bytes |
3211 |
1 |
|
|
T7 |
14 |
|
T15 |
46 |
|
T20 |
4 |
six_bytes |
3206 |
1 |
|
|
T7 |
24 |
|
T15 |
30 |
|
T20 |
4 |
five_bytes |
3278 |
1 |
|
|
T7 |
22 |
|
T15 |
38 |
|
T20 |
14 |
four_bytes |
3265 |
1 |
|
|
T7 |
18 |
|
T15 |
35 |
|
T20 |
8 |
three_bytes |
3216 |
1 |
|
|
T7 |
22 |
|
T15 |
39 |
|
T20 |
7 |
two_bytes |
3266 |
1 |
|
|
T7 |
20 |
|
T15 |
31 |
|
T20 |
5 |
one_byte |
3190 |
1 |
|
|
T7 |
19 |
|
T15 |
38 |
|
T20 |
8 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
178696 |
1 |
|
|
T7 |
643 |
|
T8 |
1181 |
|
T15 |
1603 |
auto[1] |
3485 |
1 |
|
|
T7 |
6 |
|
T8 |
42 |
|
T15 |
26 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
182181 |
1 |
|
|
T7 |
649 |
|
T8 |
1223 |
|
T15 |
1629 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
182165 |
1 |
|
|
T7 |
649 |
|
T8 |
1222 |
|
T15 |
1629 |
auto[1] |
16 |
1 |
|
|
T8 |
1 |
|
T18 |
1 |
|
T16 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1220 |
1 |
|
|
T8 |
21 |
|
T15 |
4 |
|
T31 |
1 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3485 |
1 |
|
|
T7 |
6 |
|
T8 |
42 |
|
T15 |
26 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
338549 |
1 |
|
|
T3 |
213 |
|
T7 |
1193 |
|
T8 |
2191 |
auto[1] |
568 |
1 |
|
|
T9 |
66 |
|
T10 |
76 |
|
T11 |
80 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
170779 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
127590 |
1 |
|
|
T3 |
211 |
|
T7 |
44 |
|
T8 |
2160 |
seven_bytes |
5847 |
1 |
|
|
T7 |
49 |
|
T15 |
111 |
|
T20 |
43 |
six_bytes |
5743 |
1 |
|
|
T7 |
38 |
|
T15 |
111 |
|
T20 |
53 |
five_bytes |
5906 |
1 |
|
|
T7 |
29 |
|
T15 |
114 |
|
T20 |
48 |
four_bytes |
5799 |
1 |
|
|
T7 |
26 |
|
T15 |
82 |
|
T20 |
48 |
three_bytes |
5824 |
1 |
|
|
T7 |
25 |
|
T15 |
109 |
|
T20 |
46 |
two_bytes |
5787 |
1 |
|
|
T7 |
35 |
|
T15 |
109 |
|
T20 |
49 |
one_byte |
5842 |
1 |
|
|
T7 |
33 |
|
T15 |
94 |
|
T20 |
45 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
332519 |
1 |
|
|
T3 |
209 |
|
T7 |
1179 |
|
T8 |
2129 |
auto[1] |
6598 |
1 |
|
|
T3 |
4 |
|
T7 |
14 |
|
T8 |
62 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
339117 |
1 |
|
|
T3 |
213 |
|
T7 |
1193 |
|
T8 |
2191 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
339100 |
1 |
|
|
T3 |
213 |
|
T7 |
1193 |
|
T8 |
2190 |
auto[1] |
17 |
1 |
|
|
T8 |
1 |
|
T16 |
1 |
|
T165 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2347 |
1 |
|
|
T3 |
2 |
|
T7 |
2 |
|
T8 |
31 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6598 |
1 |
|
|
T3 |
4 |
|
T7 |
14 |
|
T8 |
62 |