Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	41492980	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

42482794

1

T1

71717

T2

308

T3

56871

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	46788355	1			T1	90981		T2	183		T3	64417
values[0x0]	18042474	1			T1	38209		T2	147		T3	17551
values[0x1]	19144945	1			T1	39640		T2	141		T3	19056

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	31833693	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

52142081

1

T1

92600

T2

346

T3

67142

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	263286	1			T1	634		T2	1		T3	25
valid_sources[0x01]	272574	1			T1	652		T3	37		T13	188
valid_sources[0x02]	257600	1			T1	639		T3	33		T13	187
valid_sources[0x03]	930003	1			T1	664		T2	4		T3	38
valid_sources[0x04]	436347	1			T1	666		T2	1		T3	30
valid_sources[0x05]	334954	1			T1	617		T2	1		T3	29
valid_sources[0x06]	257592	1			T1	671		T2	2		T3	31
valid_sources[0x07]	361193	1			T1	656		T2	7		T3	30
valid_sources[0x08]	255212	1			T1	670		T2	4		T3	31
valid_sources[0x09]	256392	1			T1	634		T3	27		T13	205
valid_sources[0x0a]	577969	1			T1	671		T2	1		T3	23
valid_sources[0x0b]	259123	1			T1	722		T2	2		T3	20
valid_sources[0x0c]	321419	1			T1	656		T2	2		T3	18
valid_sources[0x0d]	258673	1			T1	655		T2	1		T3	24
valid_sources[0x0e]	258168	1			T1	663		T3	18		T13	150
valid_sources[0x0f]	256018	1			T1	613		T3	32		T13	182
valid_sources[0x10]	475198	1			T1	669		T3	23		T13	166
valid_sources[0x11]	728926	1			T1	618		T3	29		T13	166
valid_sources[0x12]	646869	1			T1	636		T3	25		T13	209
valid_sources[0x13]	256005	1			T1	712		T3	29		T13	157
valid_sources[0x14]	257591	1			T1	698		T2	2		T3	30
valid_sources[0x15]	386083	1			T1	634		T3	24		T13	177
valid_sources[0x16]	256400	1			T1	694		T3	34		T13	186
valid_sources[0x17]	342339	1			T1	669		T2	2		T3	23
valid_sources[0x18]	406963	1			T1	598		T2	3		T3	28
valid_sources[0x19]	254941	1			T1	613		T3	24		T13	176
valid_sources[0x1a]	410610	1			T1	637		T3	27		T13	195
valid_sources[0x1b]	260720	1			T1	637		T2	2		T3	34
valid_sources[0x1c]	266016	1			T1	639		T3	26		T13	176
valid_sources[0x1d]	260711	1			T1	707		T2	2		T3	30
valid_sources[0x1e]	257436	1			T1	678		T2	6		T3	24
valid_sources[0x1f]	251924	1			T1	708		T3	29		T13	193
valid_sources[0x20]	901190	1			T1	661		T2	2		T3	26
valid_sources[0x21]	367909	1			T1	665		T2	1		T3	28
valid_sources[0x22]	256087	1			T1	601		T3	28		T13	167
valid_sources[0x23]	327952	1			T1	623		T2	4		T3	24
valid_sources[0x24]	276278	1			T1	674		T2	6		T3	17
valid_sources[0x25]	259407	1			T1	611		T2	4		T3	26
valid_sources[0x26]	258083	1			T1	691		T2	2		T3	24
valid_sources[0x27]	258312	1			T1	658		T3	24		T13	180
valid_sources[0x28]	336349	1			T1	666		T2	1		T3	31
valid_sources[0x29]	257655	1			T1	622		T3	23		T13	181
valid_sources[0x2a]	260023	1			T1	567		T3	25		T35	2
valid_sources[0x2b]	257598	1			T1	631		T2	4		T3	28
valid_sources[0x2c]	257844	1			T1	655		T2	4		T3	17
valid_sources[0x2d]	257883	1			T1	597		T2	1		T3	31
valid_sources[0x2e]	262625	1			T1	629		T3	21		T13	196
valid_sources[0x2f]	256408	1			T1	684		T3	28		T13	162
valid_sources[0x30]	303546	1			T1	629		T3	26		T13	174
valid_sources[0x31]	260742	1			T1	612		T3	21		T13	170
valid_sources[0x32]	255642	1			T1	675		T2	4		T3	23
valid_sources[0x33]	261663	1			T1	664		T3	26		T13	126
valid_sources[0x34]	282772	1			T1	625		T2	2		T3	29
valid_sources[0x35]	257076	1			T1	649		T2	4		T3	29
valid_sources[0x36]	258186	1			T1	654		T2	4		T3	21
valid_sources[0x37]	371809	1			T1	663		T2	1		T3	22
valid_sources[0x38]	348121	1			T1	673		T2	1		T3	29
valid_sources[0x39]	280956	1			T1	633		T3	33		T13	205
valid_sources[0x3a]	258339	1			T1	667		T2	3		T3	26
valid_sources[0x3b]	256040	1			T1	671		T2	5		T3	33
valid_sources[0x3c]	1238110	1			T1	670		T2	3		T3	34
valid_sources[0x3d]	262466	1			T1	645		T2	1		T3	23
valid_sources[0x3e]	255074	1			T1	696		T2	4		T3	19
valid_sources[0x3f]	313479	1			T1	630		T3	27		T13	170
valid_sources[0x40]	257482	1			T1	711		T3	30		T13	189
valid_sources[0x41]	254459	1			T1	692		T2	1		T3	23
valid_sources[0x42]	387655	1			T1	705		T2	1		T3	34
valid_sources[0x43]	254381	1			T1	561		T2	1		T3	25
valid_sources[0x44]	1861174	1			T1	701		T2	11		T3	27
valid_sources[0x45]	303616	1			T1	669		T2	1		T3	28
valid_sources[0x46]	652361	1			T1	643		T2	1		T3	20
valid_sources[0x47]	254359	1			T1	612		T2	1		T3	22
valid_sources[0x48]	254875	1			T1	660		T3	28		T13	217
valid_sources[0x49]	258853	1			T1	648		T2	1		T3	27
valid_sources[0x4a]	258247	1			T1	696		T2	1		T3	25
valid_sources[0x4b]	281251	1			T1	702		T2	1		T3	29
valid_sources[0x4c]	357936	1			T1	675		T2	5		T3	94203
valid_sources[0x4d]	259867	1			T1	672		T3	27		T13	180
valid_sources[0x4e]	254062	1			T1	721		T2	5		T3	25
valid_sources[0x4f]	258665	1			T1	639		T2	2		T3	28
valid_sources[0x50]	255118	1			T1	699		T2	3		T3	25
valid_sources[0x51]	306877	1			T1	655		T3	28		T13	182
valid_sources[0x52]	258168	1			T1	660		T2	1		T3	23
valid_sources[0x53]	260806	1			T1	701		T3	32		T13	177
valid_sources[0x54]	406303	1			T1	696		T2	1		T3	26
valid_sources[0x55]	260192	1			T1	633		T2	1		T3	30
valid_sources[0x56]	262533	1			T1	702		T3	24		T13	185
valid_sources[0x57]	264299	1			T1	666		T3	27		T13	176
valid_sources[0x58]	261417	1			T1	617		T2	1		T3	30
valid_sources[0x59]	254950	1			T1	636		T2	3		T3	27
valid_sources[0x5a]	259829	1			T1	635		T3	19		T13	155
valid_sources[0x5b]	258999	1			T1	694		T2	1		T3	28
valid_sources[0x5c]	256176	1			T1	712		T2	1		T3	36
valid_sources[0x5d]	256502	1			T1	640		T2	3		T3	21
valid_sources[0x5e]	257742	1			T1	730		T2	1		T3	23
valid_sources[0x5f]	260171	1			T1	696		T2	4		T3	23
valid_sources[0x60]	509724	1			T1	700		T2	1		T3	22
valid_sources[0x61]	257553	1			T1	661		T2	2		T3	26
valid_sources[0x62]	262129	1			T1	611		T2	4		T3	24
valid_sources[0x63]	255579	1			T1	696		T2	4		T3	21
valid_sources[0x64]	413057	1			T1	660		T3	22		T13	176
valid_sources[0x65]	276848	1			T1	726		T2	2		T3	25
valid_sources[0x66]	327633	1			T1	636		T2	3		T3	26
valid_sources[0x67]	254898	1			T1	650		T2	1		T3	22
valid_sources[0x68]	256846	1			T1	651		T2	7		T3	24
valid_sources[0x69]	260816	1			T1	656		T2	1		T3	30
valid_sources[0x6a]	439081	1			T1	672		T2	4		T3	31
valid_sources[0x6b]	256196	1			T1	652		T2	4		T3	26
valid_sources[0x6c]	406725	1			T1	673		T2	2		T3	34
valid_sources[0x6d]	256391	1			T1	618		T2	1		T3	29
valid_sources[0x6e]	516967	1			T1	670		T2	2		T3	30
valid_sources[0x6f]	266710	1			T1	660		T2	2		T3	30
valid_sources[0x70]	258409	1			T1	692		T3	28		T13	180
valid_sources[0x71]	255294	1			T1	614		T2	5		T3	24
valid_sources[0x72]	258671	1			T1	595		T2	2		T3	31
valid_sources[0x73]	257517	1			T1	693		T2	1		T3	31
valid_sources[0x74]	882056	1			T1	643		T2	1		T3	20
valid_sources[0x75]	261796	1			T1	646		T2	1		T3	23
valid_sources[0x76]	258181	1			T1	633		T2	3		T3	23
valid_sources[0x77]	253500	1			T1	621		T2	5		T3	27
valid_sources[0x78]	254484	1			T1	666		T2	1		T3	29
valid_sources[0x79]	254263	1			T1	724		T3	23		T34	4
valid_sources[0x7a]	258620	1			T1	689		T3	18		T13	149
valid_sources[0x7b]	253432	1			T1	673		T2	2		T3	22
valid_sources[0x7c]	395830	1			T1	671		T3	17		T13	187
valid_sources[0x7d]	272241	1			T1	659		T3	20		T13	169
valid_sources[0x7e]	419229	1			T1	605		T2	5		T3	34
valid_sources[0x7f]	258878	1			T1	686		T2	4		T3	25
valid_sources[0x80]	255778	1			T1	635		T2	4		T3	38

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

18922560

1

T1

28495

T2

82

T3

36966

values[0x0]

all_enables

biggest_size

12352729

1

T1

23250

T2

118

T3

10609

values[0x1]

all_enables

biggest_size

11207505

1

T1

19972

T2

108

T3

9296