Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	43344072	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

42702919

1

T1

41460

T2

135

T3

6659

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	47776880	1			T1	46318		T2	81		T3	6199
values[0x0]	18528686	1			T1	9737		T2	94		T3	2585
values[0x1]	19741425	1			T1	10453		T2	81		T3	2633

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	33312924	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

52734067

1

T1

47446

T2

163

T3

7823

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	265900	1			T1	15		T2	1		T3	48
valid_sources[0x01]	266447	1			T1	13		T2	1		T3	46
valid_sources[0x02]	304614	1			T1	20		T3	44		T7	91
valid_sources[0x03]	443055	1			T1	16		T2	2		T3	50
valid_sources[0x04]	269989	1			T1	13		T2	1		T3	51
valid_sources[0x05]	264257	1			T1	19		T2	2		T3	37
valid_sources[0x06]	1044479	1			T1	13		T2	4		T3	46
valid_sources[0x07]	368604	1			T1	13		T3	46		T7	44
valid_sources[0x08]	1212655	1			T1	13		T3	50		T7	66
valid_sources[0x09]	310094	1			T1	25		T3	44		T7	63
valid_sources[0x0a]	265379	1			T1	18		T2	2		T3	38
valid_sources[0x0b]	266689	1			T1	13		T2	1		T3	54
valid_sources[0x0c]	380644	1			T1	21		T2	1		T3	59
valid_sources[0x0d]	981903	1			T1	23		T3	49		T7	71
valid_sources[0x0e]	268819	1			T1	20		T2	1		T3	38
valid_sources[0x0f]	265964	1			T1	13		T2	2		T3	44
valid_sources[0x10]	268510	1			T1	8		T3	49		T7	92
valid_sources[0x11]	262699	1			T1	9		T2	6		T3	46
valid_sources[0x12]	265427	1			T1	19		T3	45		T7	82
valid_sources[0x13]	266574	1			T1	16		T2	1		T3	42
valid_sources[0x14]	565174	1			T1	14		T2	2		T3	33
valid_sources[0x15]	267012	1			T1	16		T3	35		T7	54
valid_sources[0x16]	265044	1			T1	9		T3	48		T7	83
valid_sources[0x17]	268137	1			T1	13		T2	1		T3	44
valid_sources[0x18]	509791	1			T1	12		T3	38		T7	60
valid_sources[0x19]	264697	1			T1	23		T2	3		T3	40
valid_sources[0x1a]	265954	1			T1	14		T2	1		T3	53
valid_sources[0x1b]	268357	1			T1	14		T2	1		T3	38
valid_sources[0x1c]	266330	1			T1	20		T2	2		T3	46
valid_sources[0x1d]	263830	1			T1	17		T2	1		T3	42
valid_sources[0x1e]	262397	1			T1	18		T2	2		T3	41
valid_sources[0x1f]	266691	1			T1	14		T3	39		T7	61
valid_sources[0x20]	263466	1			T1	14		T3	47		T7	81
valid_sources[0x21]	267149	1			T1	10		T3	48		T7	73
valid_sources[0x22]	266736	1			T1	13		T2	2		T3	51
valid_sources[0x23]	265060	1			T1	12		T3	51		T7	86
valid_sources[0x24]	265588	1			T1	28		T2	1		T3	53
valid_sources[0x25]	762949	1			T1	24		T3	53		T7	63
valid_sources[0x26]	265532	1			T1	19		T3	45		T7	83
valid_sources[0x27]	267993	1			T1	17		T3	44		T7	92
valid_sources[0x28]	1123134	1			T1	10		T3	41		T7	55
valid_sources[0x29]	269081	1			T1	11		T3	50		T7	44
valid_sources[0x2a]	262649	1			T1	19		T2	1		T3	48
valid_sources[0x2b]	268816	1			T1	20		T2	4		T3	38
valid_sources[0x2c]	327005	1			T1	14		T3	28		T7	102
valid_sources[0x2d]	267868	1			T1	16		T2	3		T3	46
valid_sources[0x2e]	340260	1			T1	19		T2	1		T3	45
valid_sources[0x2f]	268511	1			T1	23		T2	1		T3	40
valid_sources[0x30]	267532	1			T1	20		T3	50		T7	64
valid_sources[0x31]	354160	1			T1	21		T3	54		T7	74
valid_sources[0x32]	267887	1			T1	12		T3	48		T7	77
valid_sources[0x33]	268710	1			T1	21		T3	44		T7	78
valid_sources[0x34]	266268	1			T1	19		T3	39		T7	68
valid_sources[0x35]	325789	1			T1	62410		T2	1		T3	48
valid_sources[0x36]	269002	1			T1	19		T2	2		T3	46
valid_sources[0x37]	281772	1			T1	15		T2	2		T3	39
valid_sources[0x38]	268120	1			T1	15		T3	45		T7	78
valid_sources[0x39]	266706	1			T1	22		T3	46		T7	55
valid_sources[0x3a]	269183	1			T1	31		T3	50		T7	71
valid_sources[0x3b]	270326	1			T1	17		T2	1		T3	34
valid_sources[0x3c]	925106	1			T1	18		T2	6		T3	36
valid_sources[0x3d]	267372	1			T1	16		T3	47		T7	75
valid_sources[0x3e]	266456	1			T1	15		T3	39		T7	88
valid_sources[0x3f]	274305	1			T1	22		T3	48		T7	91
valid_sources[0x40]	271664	1			T1	21		T2	2		T3	43
valid_sources[0x41]	350260	1			T1	13		T2	1		T3	51
valid_sources[0x42]	266770	1			T1	15		T3	42		T7	98
valid_sources[0x43]	266136	1			T1	14		T2	1		T3	39
valid_sources[0x44]	466209	1			T1	16		T3	47		T7	112
valid_sources[0x45]	265152	1			T1	11		T3	45		T7	44
valid_sources[0x46]	263019	1			T1	14		T3	39		T7	50
valid_sources[0x47]	264958	1			T1	14		T3	40		T7	66
valid_sources[0x48]	265086	1			T1	18		T3	39		T7	92
valid_sources[0x49]	267171	1			T1	17		T3	39		T7	77
valid_sources[0x4a]	267101	1			T1	12		T2	3		T3	51
valid_sources[0x4b]	266489	1			T1	12		T2	4		T3	48
valid_sources[0x4c]	283416	1			T1	18		T3	54		T7	32
valid_sources[0x4d]	265268	1			T1	12		T3	51		T7	77
valid_sources[0x4e]	267406	1			T1	22		T3	47		T7	73
valid_sources[0x4f]	383453	1			T1	14		T2	6		T3	49
valid_sources[0x50]	269422	1			T1	20		T2	1		T3	48
valid_sources[0x51]	266333	1			T1	14		T3	58		T7	53
valid_sources[0x52]	294965	1			T1	11		T2	1		T3	45
valid_sources[0x53]	561098	1			T1	19		T2	1		T3	37
valid_sources[0x54]	265040	1			T1	14		T3	35		T7	63
valid_sources[0x55]	281549	1			T1	12		T2	1		T3	41
valid_sources[0x56]	263962	1			T1	14		T2	2		T3	50
valid_sources[0x57]	307511	1			T1	11		T2	3		T3	55
valid_sources[0x58]	264756	1			T1	17		T2	2		T3	42
valid_sources[0x59]	641382	1			T1	15		T3	47		T7	70
valid_sources[0x5a]	268952	1			T1	13		T3	40		T7	92
valid_sources[0x5b]	264823	1			T1	16		T2	1		T3	40
valid_sources[0x5c]	282299	1			T1	14		T2	1		T3	43
valid_sources[0x5d]	266838	1			T1	18		T2	1		T3	44
valid_sources[0x5e]	364206	1			T1	16		T3	45		T7	62
valid_sources[0x5f]	267368	1			T1	7		T3	55		T7	78
valid_sources[0x60]	265790	1			T1	15		T2	1		T3	36
valid_sources[0x61]	266902	1			T1	24		T2	2		T3	53
valid_sources[0x62]	302745	1			T1	17		T3	37		T7	80
valid_sources[0x63]	266561	1			T1	22		T3	55		T7	82
valid_sources[0x64]	267700	1			T1	12		T2	8		T3	50
valid_sources[0x65]	319541	1			T1	9		T2	5		T3	43
valid_sources[0x66]	270427	1			T1	16		T3	47		T7	80
valid_sources[0x67]	266382	1			T1	15		T2	3		T3	47
valid_sources[0x68]	267317	1			T1	17		T3	45		T7	72
valid_sources[0x69]	267525	1			T1	12		T3	45		T7	50
valid_sources[0x6a]	266904	1			T1	14		T2	3		T3	51
valid_sources[0x6b]	264864	1			T1	15		T3	41		T7	55
valid_sources[0x6c]	310762	1			T1	14		T2	1		T3	39
valid_sources[0x6d]	265065	1			T1	10		T2	2		T3	56
valid_sources[0x6e]	328860	1			T1	19		T3	43		T33	15
valid_sources[0x6f]	266539	1			T1	23		T3	36		T7	41
valid_sources[0x70]	266259	1			T1	15		T3	42		T7	59
valid_sources[0x71]	267022	1			T1	14		T3	34		T7	74
valid_sources[0x72]	483004	1			T1	15		T3	50		T7	62
valid_sources[0x73]	264586	1			T1	18		T3	43		T7	84
valid_sources[0x74]	372758	1			T1	14		T3	40		T7	64
valid_sources[0x75]	268603	1			T1	14		T2	1		T3	48
valid_sources[0x76]	296733	1			T1	12		T2	2		T3	41
valid_sources[0x77]	268141	1			T1	14		T2	1		T3	45
valid_sources[0x78]	272779	1			T1	15		T3	37		T7	77
valid_sources[0x79]	308907	1			T1	12		T2	2		T3	50
valid_sources[0x7a]	264420	1			T1	18		T3	45		T7	50
valid_sources[0x7b]	265244	1			T1	14		T3	48		T7	68
valid_sources[0x7c]	265144	1			T1	12		T3	44		T7	74
valid_sources[0x7d]	821287	1			T1	18		T3	40		T7	67
valid_sources[0x7e]	268390	1			T1	20		T2	2		T3	42
valid_sources[0x7f]	267797	1			T1	11		T3	37		T7	63
valid_sources[0x80]	1252378	1			T1	15		T3	41		T7	80

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

19179088

1

T1

29944

T2

31

T3

3542

values[0x0]

all_enables

biggest_size

12377335

1

T1

6129

T2

61

T3

1683

values[0x1]

all_enables

biggest_size

11146496

1

T1

5387

T2

43

T3

1434