Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
165425 |
1 |
|
|
T4 |
341 |
|
T10 |
212 |
|
T11 |
318 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
81611 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
64363 |
1 |
|
|
T4 |
336 |
|
T10 |
209 |
|
T11 |
313 |
seven_bytes |
2819 |
1 |
|
|
T12 |
18 |
|
T13 |
55 |
|
T27 |
40 |
six_bytes |
2748 |
1 |
|
|
T12 |
17 |
|
T13 |
58 |
|
T27 |
33 |
five_bytes |
2844 |
1 |
|
|
T12 |
17 |
|
T13 |
65 |
|
T27 |
46 |
four_bytes |
2721 |
1 |
|
|
T12 |
16 |
|
T13 |
58 |
|
T27 |
44 |
three_bytes |
2705 |
1 |
|
|
T12 |
20 |
|
T13 |
64 |
|
T27 |
44 |
two_bytes |
2734 |
1 |
|
|
T12 |
12 |
|
T13 |
61 |
|
T27 |
43 |
one_byte |
2880 |
1 |
|
|
T12 |
23 |
|
T13 |
60 |
|
T27 |
38 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
162181 |
1 |
|
|
T4 |
331 |
|
T10 |
206 |
|
T11 |
308 |
auto[1] |
3244 |
1 |
|
|
T4 |
10 |
|
T10 |
6 |
|
T11 |
10 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
165425 |
1 |
|
|
T4 |
341 |
|
T10 |
212 |
|
T11 |
318 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
165415 |
1 |
|
|
T4 |
341 |
|
T10 |
212 |
|
T11 |
318 |
auto[1] |
10 |
1 |
|
|
T5 |
1 |
|
T13 |
1 |
|
T70 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1177 |
1 |
|
|
T4 |
5 |
|
T10 |
3 |
|
T11 |
5 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3244 |
1 |
|
|
T4 |
10 |
|
T10 |
6 |
|
T11 |
10 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
162328 |
1 |
|
|
T4 |
802 |
|
T9 |
147 |
|
T11 |
202 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
78774 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
65189 |
1 |
|
|
T4 |
791 |
|
T9 |
145 |
|
T11 |
199 |
seven_bytes |
2688 |
1 |
|
|
T12 |
55 |
|
T13 |
66 |
|
T27 |
51 |
six_bytes |
2628 |
1 |
|
|
T12 |
51 |
|
T13 |
77 |
|
T27 |
52 |
five_bytes |
2631 |
1 |
|
|
T12 |
42 |
|
T13 |
75 |
|
T27 |
52 |
four_bytes |
2596 |
1 |
|
|
T12 |
49 |
|
T13 |
81 |
|
T27 |
46 |
three_bytes |
2561 |
1 |
|
|
T12 |
54 |
|
T13 |
59 |
|
T27 |
46 |
two_bytes |
2599 |
1 |
|
|
T12 |
50 |
|
T13 |
82 |
|
T27 |
55 |
one_byte |
2662 |
1 |
|
|
T12 |
65 |
|
T13 |
82 |
|
T27 |
44 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
159002 |
1 |
|
|
T4 |
780 |
|
T9 |
143 |
|
T11 |
196 |
auto[1] |
3326 |
1 |
|
|
T4 |
22 |
|
T9 |
4 |
|
T11 |
6 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
162328 |
1 |
|
|
T4 |
802 |
|
T9 |
147 |
|
T11 |
202 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
162318 |
1 |
|
|
T4 |
802 |
|
T9 |
147 |
|
T11 |
202 |
auto[1] |
10 |
1 |
|
|
T162 |
1 |
|
T163 |
1 |
|
T164 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1217 |
1 |
|
|
T4 |
11 |
|
T9 |
2 |
|
T11 |
3 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3326 |
1 |
|
|
T4 |
22 |
|
T9 |
4 |
|
T11 |
6 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
323346 |
1 |
|
|
T4 |
640 |
|
T9 |
212 |
|
T10 |
440 |
auto[1] |
356 |
1 |
|
|
T4 |
9 |
|
T5 |
82 |
|
T6 |
21 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
161479 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
124147 |
1 |
|
|
T4 |
640 |
|
T9 |
209 |
|
T10 |
433 |
seven_bytes |
5465 |
1 |
|
|
T12 |
50 |
|
T13 |
94 |
|
T27 |
96 |
six_bytes |
5449 |
1 |
|
|
T12 |
67 |
|
T13 |
108 |
|
T27 |
96 |
five_bytes |
5511 |
1 |
|
|
T12 |
69 |
|
T13 |
102 |
|
T27 |
101 |
four_bytes |
5420 |
1 |
|
|
T12 |
61 |
|
T13 |
91 |
|
T27 |
101 |
three_bytes |
5516 |
1 |
|
|
T12 |
78 |
|
T13 |
99 |
|
T27 |
95 |
two_bytes |
5365 |
1 |
|
|
T12 |
66 |
|
T13 |
106 |
|
T27 |
102 |
one_byte |
5350 |
1 |
|
|
T12 |
54 |
|
T13 |
87 |
|
T27 |
91 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
317280 |
1 |
|
|
T4 |
631 |
|
T9 |
206 |
|
T10 |
426 |
auto[1] |
6422 |
1 |
|
|
T4 |
18 |
|
T9 |
6 |
|
T10 |
14 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
323702 |
1 |
|
|
T4 |
649 |
|
T9 |
212 |
|
T10 |
440 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
323683 |
1 |
|
|
T4 |
649 |
|
T9 |
212 |
|
T10 |
440 |
auto[1] |
19 |
1 |
|
|
T5 |
2 |
|
T33 |
1 |
|
T151 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2290 |
1 |
|
|
T4 |
9 |
|
T9 |
3 |
|
T10 |
7 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6422 |
1 |
|
|
T4 |
18 |
|
T9 |
6 |
|
T10 |
14 |