Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
168835 |
1 |
|
|
T10 |
990 |
|
T12 |
1067 |
|
T4 |
2674 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
82857 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
66112 |
1 |
|
|
T10 |
28 |
|
T12 |
30 |
|
T4 |
2629 |
seven_bytes |
2899 |
1 |
|
|
T10 |
27 |
|
T12 |
21 |
|
T31 |
19 |
six_bytes |
2847 |
1 |
|
|
T10 |
30 |
|
T12 |
33 |
|
T31 |
31 |
five_bytes |
2949 |
1 |
|
|
T10 |
21 |
|
T12 |
32 |
|
T31 |
34 |
four_bytes |
2693 |
1 |
|
|
T10 |
22 |
|
T12 |
25 |
|
T31 |
30 |
three_bytes |
2817 |
1 |
|
|
T10 |
39 |
|
T12 |
27 |
|
T31 |
37 |
two_bytes |
2836 |
1 |
|
|
T10 |
35 |
|
T12 |
38 |
|
T31 |
38 |
one_byte |
2825 |
1 |
|
|
T10 |
22 |
|
T12 |
27 |
|
T31 |
30 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
165395 |
1 |
|
|
T10 |
974 |
|
T12 |
1051 |
|
T4 |
2584 |
auto[1] |
3440 |
1 |
|
|
T10 |
16 |
|
T12 |
16 |
|
T4 |
90 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
168835 |
1 |
|
|
T10 |
990 |
|
T12 |
1067 |
|
T4 |
2674 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
168828 |
1 |
|
|
T10 |
990 |
|
T12 |
1067 |
|
T4 |
2674 |
auto[1] |
7 |
1 |
|
|
T177 |
1 |
|
T178 |
1 |
|
T69 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1240 |
1 |
|
|
T10 |
1 |
|
T12 |
2 |
|
T4 |
45 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3440 |
1 |
|
|
T10 |
16 |
|
T12 |
16 |
|
T4 |
90 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174856 |
1 |
|
|
T10 |
1103 |
|
T12 |
1797 |
|
T4 |
2037 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
83075 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
71793 |
1 |
|
|
T10 |
37 |
|
T12 |
41 |
|
T4 |
2005 |
seven_bytes |
2870 |
1 |
|
|
T10 |
37 |
|
T12 |
43 |
|
T31 |
53 |
six_bytes |
2857 |
1 |
|
|
T10 |
35 |
|
T12 |
62 |
|
T31 |
53 |
five_bytes |
2889 |
1 |
|
|
T10 |
29 |
|
T12 |
60 |
|
T31 |
61 |
four_bytes |
2770 |
1 |
|
|
T10 |
30 |
|
T12 |
45 |
|
T31 |
48 |
three_bytes |
2886 |
1 |
|
|
T10 |
29 |
|
T12 |
48 |
|
T31 |
43 |
two_bytes |
2945 |
1 |
|
|
T10 |
43 |
|
T12 |
55 |
|
T31 |
58 |
one_byte |
2771 |
1 |
|
|
T10 |
29 |
|
T12 |
48 |
|
T31 |
54 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
171370 |
1 |
|
|
T10 |
1087 |
|
T12 |
1773 |
|
T4 |
1973 |
auto[1] |
3486 |
1 |
|
|
T10 |
16 |
|
T12 |
24 |
|
T4 |
64 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174856 |
1 |
|
|
T10 |
1103 |
|
T12 |
1797 |
|
T4 |
2037 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174840 |
1 |
|
|
T10 |
1103 |
|
T12 |
1797 |
|
T4 |
2036 |
auto[1] |
16 |
1 |
|
|
T4 |
1 |
|
T179 |
1 |
|
T180 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1311 |
1 |
|
|
T10 |
2 |
|
T12 |
3 |
|
T4 |
32 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3486 |
1 |
|
|
T10 |
16 |
|
T12 |
24 |
|
T4 |
64 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
336541 |
1 |
|
|
T9 |
34 |
|
T10 |
538 |
|
T13 |
18 |
auto[1] |
566 |
1 |
|
|
T4 |
79 |
|
T5 |
44 |
|
T6 |
76 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
163722 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
134395 |
1 |
|
|
T9 |
33 |
|
T10 |
10 |
|
T12 |
49 |
seven_bytes |
5540 |
1 |
|
|
T10 |
18 |
|
T13 |
2 |
|
T12 |
40 |
six_bytes |
5626 |
1 |
|
|
T10 |
13 |
|
T13 |
1 |
|
T12 |
47 |
five_bytes |
5662 |
1 |
|
|
T10 |
18 |
|
T12 |
52 |
|
T31 |
96 |
four_bytes |
5559 |
1 |
|
|
T10 |
9 |
|
T13 |
1 |
|
T12 |
35 |
three_bytes |
5525 |
1 |
|
|
T10 |
5 |
|
T12 |
55 |
|
T31 |
105 |
two_bytes |
5554 |
1 |
|
|
T10 |
11 |
|
T13 |
2 |
|
T12 |
53 |
one_byte |
5524 |
1 |
|
|
T10 |
8 |
|
T12 |
48 |
|
T31 |
91 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
330389 |
1 |
|
|
T9 |
32 |
|
T10 |
526 |
|
T13 |
18 |
auto[1] |
6718 |
1 |
|
|
T9 |
2 |
|
T10 |
12 |
|
T12 |
22 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
337107 |
1 |
|
|
T9 |
34 |
|
T10 |
538 |
|
T13 |
18 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
337084 |
1 |
|
|
T9 |
34 |
|
T10 |
538 |
|
T13 |
18 |
auto[1] |
23 |
1 |
|
|
T5 |
1 |
|
T68 |
1 |
|
T27 |
2 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2419 |
1 |
|
|
T9 |
1 |
|
T12 |
3 |
|
T4 |
79 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6718 |
1 |
|
|
T9 |
2 |
|
T10 |
12 |
|
T12 |
22 |