Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_28/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	390	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2876	1			T58	1		T200	1		T126	2
len_5001_7500	6690	1			T58	3		T88	3		T200	5
len_2501_5000	1541	1			T200	1		T126	3		T35	1
len_1025_2500	956	1			T58	1		T200	1		T126	3
len_769_1024	5381	1			T12	1		T13	4		T58	1
len_513_768	5786	1			T12	1		T23	6		T14	11
len_257_512	6197	1			T12	3		T13	5		T23	10
len_0_256	18482	1			T1	3		T2	3		T11	69
len_keccak_block_sizes[72]	39	1			T49	1		T50	1		T91	1
len_keccak_block_sizes[104]	31	1			T49	1		T50	1		T189	1
len_keccak_block_sizes[136]	34	1			T50	1		T189	1		T64	1
len_keccak_block_sizes[144]	29	1			T189	1		T15	1		T201	1
len_keccak_block_sizes[168]	29	1			T24	1		T201	1		T104	1
len_1	60	1			T49	1		T50	1		T91	1
len_0	533	1			T49	1		T50	1		T91	1