Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_28/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	708	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5478	1			T12	1		T13	3		T58	2
len_601_800	12466	1			T12	3		T13	2		T58	4
len_401_600	8168	1			T13	5		T23	7		T14	11
len_201_400	4280	1			T12	1		T23	8		T88	1
len_65_200	7060	1			T11	31		T31	7		T94	33
len_min_for_xof_require_squeeze	64	1			T202	2		T203	1		T77	1
len_keccak_block_sizes[72]	71	1			T130	2		T203	2		T204	9
len_keccak_block_sizes[104]	58	1			T94	1		T130	1		T203	2
len_keccak_block_sizes[136]	63	1			T94	1		T203	2		T36	1
len_keccak_block_sizes[144]	39	1			T36	1		T79	1		T205	5
len_keccak_block_sizes[168]	41	1			T11	1		T206	1		T96	1
len_datapath_width	1000	1			T2	3		T11	4		T63	3
len_2_63	14353	1			T1	3		T11	33		T49	105
len_1	52	1			T11	1		T94	3		T203	3