Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_03/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	47442257	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

45996694

1

T1

2

T2

14

T3

8

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	51891057	1			T1	1		T2	9		T3	5
values[0x0]	20133075	1			T1	4		T2	9		T3	6
values[0x1]	21414819	1			T1	13		T2	9		T3	5

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	36488040	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

56950911

1

T1

5

T2

16

T3

9

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	291946	1			T12	1		T13	41		T30	2
valid_sources[0x01]	293121	1			T12	1		T13	30		T30	2
valid_sources[0x02]	319334	1			T12	1		T13	18		T30	2
valid_sources[0x03]	292776	1			T12	1		T13	11		T30	7
valid_sources[0x04]	293740	1			T12	4		T13	17		T30	1
valid_sources[0x05]	293668	1			T12	1		T13	24		T30	2
valid_sources[0x06]	297856	1			T12	6		T13	26		T30	3
valid_sources[0x07]	306356	1			T12	8		T13	34		T30	2
valid_sources[0x08]	295913	1			T2	5		T12	5		T13	56
valid_sources[0x09]	295845	1			T12	2		T13	20		T46	1
valid_sources[0x0a]	293267	1			T12	4		T13	31		T30	4
valid_sources[0x0b]	355819	1			T12	4		T13	31		T46	4
valid_sources[0x0c]	323813	1			T12	2		T13	45		T9	10
valid_sources[0x0d]	309913	1			T12	4		T13	53		T30	2
valid_sources[0x0e]	430777	1			T2	1		T12	3		T13	22
valid_sources[0x0f]	292289	1			T12	3		T13	31		T30	9
valid_sources[0x10]	293706	1			T12	6		T13	12		T30	4
valid_sources[0x11]	405557	1			T12	3		T13	20		T30	4
valid_sources[0x12]	293752	1			T13	31		T30	1		T46	2
valid_sources[0x13]	463081	1			T12	1		T13	16		T30	2
valid_sources[0x14]	291342	1			T12	8		T13	17		T30	1
valid_sources[0x15]	296372	1			T12	3		T13	32		T46	1
valid_sources[0x16]	292176	1			T12	4		T13	38		T30	3
valid_sources[0x17]	294642	1			T12	3		T13	9		T30	1
valid_sources[0x18]	295370	1			T1	4		T12	2		T13	42
valid_sources[0x19]	572480	1			T12	3		T13	23		T30	6
valid_sources[0x1a]	1203657	1			T12	2		T13	27		T46	3
valid_sources[0x1b]	1132066	1			T12	3		T13	45		T30	2
valid_sources[0x1c]	295155	1			T12	6		T13	42		T30	4
valid_sources[0x1d]	292689	1			T12	4		T13	11		T30	1
valid_sources[0x1e]	293742	1			T12	3		T13	54		T30	1
valid_sources[0x1f]	295537	1			T12	3		T13	50		T30	3
valid_sources[0x20]	1200786	1			T12	4		T13	19		T30	4
valid_sources[0x21]	292529	1			T12	1		T13	37		T9	33
valid_sources[0x22]	296123	1			T12	6		T13	12		T30	4
valid_sources[0x23]	293842	1			T2	4		T12	5		T13	40
valid_sources[0x24]	293985	1			T12	5		T13	12		T30	1
valid_sources[0x25]	318005	1			T12	4		T13	16		T30	1
valid_sources[0x26]	354548	1			T12	5		T13	46		T30	1
valid_sources[0x27]	292154	1			T12	1		T13	27		T30	3
valid_sources[0x28]	295893	1			T12	2		T13	26		T30	1
valid_sources[0x29]	654160	1			T12	3		T13	51		T30	1
valid_sources[0x2a]	294102	1			T12	4		T13	6		T46	5
valid_sources[0x2b]	296134	1			T12	4		T13	14		T30	2
valid_sources[0x2c]	295219	1			T12	5		T13	9		T30	7
valid_sources[0x2d]	305678	1			T12	4		T13	14		T30	10
valid_sources[0x2e]	297477	1			T12	4		T13	43		T9	17
valid_sources[0x2f]	919699	1			T12	7		T13	30		T30	3
valid_sources[0x30]	292104	1			T12	6		T13	25		T30	3
valid_sources[0x31]	294711	1			T12	7		T13	28		T46	3
valid_sources[0x32]	293831	1			T12	4		T13	34		T30	3
valid_sources[0x33]	295283	1			T12	3		T13	37		T30	6
valid_sources[0x34]	297623	1			T12	4		T13	29		T30	1
valid_sources[0x35]	292933	1			T12	5		T13	21		T30	2
valid_sources[0x36]	293047	1			T12	3		T13	18		T30	2
valid_sources[0x37]	362146	1			T12	4		T13	30		T30	1
valid_sources[0x38]	436757	1			T12	3		T13	55		T30	3
valid_sources[0x39]	475818	1			T12	3		T13	35		T30	3
valid_sources[0x3a]	362474	1			T12	2		T13	33		T30	1
valid_sources[0x3b]	451404	1			T12	3		T13	16		T30	3
valid_sources[0x3c]	297423	1			T2	3		T12	7		T13	23
valid_sources[0x3d]	323092	1			T12	5		T13	63		T30	1
valid_sources[0x3e]	293407	1			T12	3		T13	15		T30	3
valid_sources[0x3f]	292228	1			T12	1		T13	17		T30	2
valid_sources[0x40]	293064	1			T12	8		T13	7		T9	16
valid_sources[0x41]	293353	1			T12	4		T13	29		T46	1
valid_sources[0x42]	294934	1			T12	11		T13	15		T30	2
valid_sources[0x43]	312051	1			T12	4		T13	14		T46	1
valid_sources[0x44]	1225636	1			T12	1		T13	23		T9	23
valid_sources[0x45]	293640	1			T12	3		T13	32		T30	3
valid_sources[0x46]	293563	1			T12	6		T13	27		T30	2
valid_sources[0x47]	305164	1			T12	3		T13	12		T30	1
valid_sources[0x48]	292641	1			T12	2		T13	20		T9	17
valid_sources[0x49]	309831	1			T12	7		T13	24		T30	1
valid_sources[0x4a]	294964	1			T12	9		T13	12		T30	2
valid_sources[0x4b]	293323	1			T12	2		T13	46		T30	1
valid_sources[0x4c]	364207	1			T12	1		T13	17		T30	1
valid_sources[0x4d]	296893	1			T12	3		T13	24		T30	5
valid_sources[0x4e]	296239	1			T12	2		T13	56		T30	1
valid_sources[0x4f]	294429	1			T12	3		T13	17		T30	1
valid_sources[0x50]	296398	1			T2	1		T12	3		T13	22
valid_sources[0x51]	292680	1			T12	2		T13	23		T30	2
valid_sources[0x52]	294115	1			T12	4		T13	16		T30	2
valid_sources[0x53]	290896	1			T12	8		T13	28		T46	1
valid_sources[0x54]	295147	1			T12	4		T13	61		T46	6
valid_sources[0x55]	294991	1			T12	5		T13	28		T30	4
valid_sources[0x56]	294403	1			T12	1		T13	22		T30	1
valid_sources[0x57]	398822	1			T12	5		T13	36		T30	2
valid_sources[0x58]	291783	1			T12	5		T13	17		T30	3
valid_sources[0x59]	677284	1			T12	4		T13	27		T30	1
valid_sources[0x5a]	293658	1			T12	2		T13	30		T30	1
valid_sources[0x5b]	293494	1			T12	6		T13	28		T30	7
valid_sources[0x5c]	296226	1			T12	2		T13	75		T30	2
valid_sources[0x5d]	295865	1			T12	1		T13	30		T30	1
valid_sources[0x5e]	292513	1			T12	2		T13	13		T30	5
valid_sources[0x5f]	292894	1			T12	3		T13	9		T30	2
valid_sources[0x60]	377722	1			T12	4		T13	28		T30	3
valid_sources[0x61]	320201	1			T12	2		T13	14		T30	11
valid_sources[0x62]	291915	1			T12	2		T13	19		T30	4
valid_sources[0x63]	295368	1			T13	13		T30	2		T46	1
valid_sources[0x64]	292551	1			T12	3		T13	26		T30	2
valid_sources[0x65]	292888	1			T12	4		T13	19		T30	2
valid_sources[0x66]	308649	1			T12	2		T13	13		T30	1
valid_sources[0x67]	291538	1			T12	5		T13	21		T46	11
valid_sources[0x68]	293537	1			T12	4		T13	45		T46	1
valid_sources[0x69]	299838	1			T12	5		T13	35		T30	4
valid_sources[0x6a]	292109	1			T12	1		T7	354		T13	57
valid_sources[0x6b]	293205	1			T12	2		T13	91		T30	1
valid_sources[0x6c]	406132	1			T12	1		T13	44		T30	1
valid_sources[0x6d]	476500	1			T12	4		T13	33		T46	4
valid_sources[0x6e]	296622	1			T2	3		T13	17		T30	2
valid_sources[0x6f]	295831	1			T12	2		T13	12		T9	31
valid_sources[0x70]	292172	1			T12	2		T13	54		T30	2
valid_sources[0x71]	291903	1			T12	1		T13	50		T30	2
valid_sources[0x72]	373220	1			T12	3		T13	19		T30	2
valid_sources[0x73]	574706	1			T12	3		T13	29		T46	4
valid_sources[0x74]	423309	1			T1	9		T12	3		T13	37
valid_sources[0x75]	291493	1			T12	3		T13	37		T46	2
valid_sources[0x76]	413577	1			T12	3		T13	16		T30	2
valid_sources[0x77]	290380	1			T12	2		T13	46		T30	4
valid_sources[0x78]	366058	1			T12	5		T13	39		T9	33
valid_sources[0x79]	291897	1			T12	3		T13	22		T30	4
valid_sources[0x7a]	292065	1			T12	2		T13	33		T46	7
valid_sources[0x7b]	298501	1			T12	3		T13	24		T30	1
valid_sources[0x7c]	294861	1			T2	1		T12	5		T13	22
valid_sources[0x7d]	569585	1			T12	2		T13	20		T46	1
valid_sources[0x7e]	292944	1			T13	14		T30	1		T46	7
valid_sources[0x7f]	422792	1			T12	2		T13	6		T30	1
valid_sources[0x80]	455780	1			T12	4		T13	38		T30	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

20181592

1

T1

1

T2

3

T3

3

values[0x0]

all_enables

biggest_size

13564345

1

T1

1

T2

4

T3

3

values[0x1]

all_enables

biggest_size

12250757

1

T2

7

T3

2

T11

145