Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
167902 |
1 |
|
|
T9 |
215 |
|
T10 |
38 |
|
T11 |
2 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
87598 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
59317 |
1 |
|
|
T9 |
5 |
|
T10 |
3 |
|
T11 |
2 |
seven_bytes |
3057 |
1 |
|
|
T9 |
4 |
|
T10 |
1 |
|
T14 |
3 |
six_bytes |
2935 |
1 |
|
|
T9 |
7 |
|
T10 |
1 |
|
T14 |
4 |
five_bytes |
3045 |
1 |
|
|
T9 |
5 |
|
T10 |
1 |
|
T14 |
3 |
four_bytes |
3010 |
1 |
|
|
T9 |
8 |
|
T10 |
1 |
|
T14 |
13 |
three_bytes |
2989 |
1 |
|
|
T9 |
9 |
|
T14 |
3 |
|
T34 |
34 |
two_bytes |
3028 |
1 |
|
|
T9 |
9 |
|
T10 |
1 |
|
T14 |
12 |
one_byte |
2923 |
1 |
|
|
T9 |
6 |
|
T10 |
1 |
|
T14 |
2 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164662 |
1 |
|
|
T9 |
213 |
|
T10 |
36 |
|
T11 |
2 |
auto[1] |
3240 |
1 |
|
|
T9 |
2 |
|
T10 |
2 |
|
T13 |
16 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
167902 |
1 |
|
|
T9 |
215 |
|
T10 |
38 |
|
T11 |
2 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
167886 |
1 |
|
|
T9 |
215 |
|
T10 |
38 |
|
T11 |
2 |
auto[1] |
16 |
1 |
|
|
T13 |
1 |
|
T59 |
1 |
|
T143 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1139 |
1 |
|
|
T10 |
1 |
|
T13 |
8 |
|
T31 |
4 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3240 |
1 |
|
|
T9 |
2 |
|
T10 |
2 |
|
T13 |
16 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
175785 |
1 |
|
|
T9 |
11 |
|
T12 |
124 |
|
T13 |
312 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
96012 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
56920 |
1 |
|
|
T9 |
2 |
|
T12 |
123 |
|
T13 |
308 |
seven_bytes |
3289 |
1 |
|
|
T34 |
15 |
|
T59 |
62 |
|
T60 |
31 |
six_bytes |
3151 |
1 |
|
|
T34 |
20 |
|
T59 |
77 |
|
T60 |
25 |
five_bytes |
3340 |
1 |
|
|
T9 |
1 |
|
T34 |
23 |
|
T59 |
65 |
four_bytes |
3230 |
1 |
|
|
T34 |
18 |
|
T59 |
67 |
|
T60 |
18 |
three_bytes |
3254 |
1 |
|
|
T34 |
23 |
|
T59 |
63 |
|
T60 |
27 |
two_bytes |
3336 |
1 |
|
|
T34 |
25 |
|
T59 |
73 |
|
T60 |
21 |
one_byte |
3253 |
1 |
|
|
T34 |
22 |
|
T59 |
64 |
|
T60 |
22 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
172461 |
1 |
|
|
T9 |
9 |
|
T12 |
122 |
|
T13 |
304 |
auto[1] |
3324 |
1 |
|
|
T9 |
2 |
|
T12 |
2 |
|
T13 |
8 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
175785 |
1 |
|
|
T9 |
11 |
|
T12 |
124 |
|
T13 |
312 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
175770 |
1 |
|
|
T9 |
11 |
|
T12 |
124 |
|
T13 |
312 |
auto[1] |
15 |
1 |
|
|
T5 |
1 |
|
T6 |
1 |
|
T144 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1084 |
1 |
|
|
T9 |
1 |
|
T12 |
1 |
|
T13 |
4 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3324 |
1 |
|
|
T9 |
2 |
|
T12 |
2 |
|
T13 |
8 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
333012 |
1 |
|
|
T9 |
218 |
|
T10 |
905 |
|
T4 |
233 |
auto[1] |
399 |
1 |
|
|
T4 |
3 |
|
T5 |
3 |
|
T6 |
83 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
177955 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
113229 |
1 |
|
|
T9 |
3 |
|
T10 |
24 |
|
T4 |
233 |
seven_bytes |
6058 |
1 |
|
|
T9 |
5 |
|
T10 |
25 |
|
T15 |
6 |
six_bytes |
6057 |
1 |
|
|
T9 |
13 |
|
T10 |
20 |
|
T14 |
2 |
five_bytes |
5954 |
1 |
|
|
T9 |
4 |
|
T10 |
26 |
|
T14 |
2 |
four_bytes |
6060 |
1 |
|
|
T9 |
7 |
|
T10 |
19 |
|
T14 |
1 |
three_bytes |
6115 |
1 |
|
|
T9 |
4 |
|
T10 |
16 |
|
T14 |
2 |
two_bytes |
6008 |
1 |
|
|
T9 |
6 |
|
T10 |
26 |
|
T14 |
4 |
one_byte |
5975 |
1 |
|
|
T9 |
3 |
|
T10 |
30 |
|
T14 |
1 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
327135 |
1 |
|
|
T9 |
216 |
|
T10 |
895 |
|
T4 |
230 |
auto[1] |
6276 |
1 |
|
|
T9 |
2 |
|
T10 |
10 |
|
T4 |
6 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
333411 |
1 |
|
|
T9 |
218 |
|
T10 |
905 |
|
T4 |
236 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
333388 |
1 |
|
|
T9 |
218 |
|
T10 |
905 |
|
T4 |
236 |
auto[1] |
23 |
1 |
|
|
T13 |
1 |
|
T32 |
1 |
|
T144 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2154 |
1 |
|
|
T9 |
1 |
|
T10 |
4 |
|
T4 |
3 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6276 |
1 |
|
|
T9 |
2 |
|
T10 |
10 |
|
T4 |
6 |