Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_08/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	48405799	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

47603719

1

T1

21223

T2

5846

T3

7411

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	53038965	1			T1	14817		T2	6245		T3	8279
values[0x0]	20807621	1			T1	5357		T2	2209		T3	3526
values[0x1]	22162932	1			T1	5520		T2	2417		T3	3746

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	37231797	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

58777721

1

T1

22400

T2

6975

T3

9208

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	290114	1			T1	138		T2	40		T7	2
valid_sources[0x01]	288856	1			T1	86		T2	26		T10	61
valid_sources[0x02]	286260	1			T1	78		T2	35		T10	70
valid_sources[0x03]	318613	1			T1	111		T2	50		T9	1
valid_sources[0x04]	291324	1			T1	90		T2	42		T7	1
valid_sources[0x05]	287950	1			T1	104		T2	48		T9	1
valid_sources[0x06]	291328	1			T1	101		T2	40		T43	8
valid_sources[0x07]	289160	1			T1	78		T2	53		T7	1
valid_sources[0x08]	289285	1			T1	112		T2	49		T7	2
valid_sources[0x09]	429464	1			T1	32		T2	39		T7	2
valid_sources[0x0a]	287759	1			T1	49		T2	46		T9	1
valid_sources[0x0b]	302504	1			T1	51		T2	30		T3	15551
valid_sources[0x0c]	370038	1			T1	100		T2	33		T10	70
valid_sources[0x0d]	292339	1			T1	147		T2	40		T7	1
valid_sources[0x0e]	290626	1			T1	132		T2	50		T7	1
valid_sources[0x0f]	285124	1			T1	107		T2	32		T9	1
valid_sources[0x10]	293839	1			T1	131		T2	35		T7	3
valid_sources[0x11]	291073	1			T1	97		T2	47		T7	1
valid_sources[0x12]	292756	1			T1	108		T2	46		T7	3
valid_sources[0x13]	333951	1			T1	105		T2	36		T9	1
valid_sources[0x14]	287084	1			T1	108		T2	39		T7	1
valid_sources[0x15]	283706	1			T1	140		T2	41		T7	2
valid_sources[0x16]	364803	1			T1	114		T2	38		T7	1
valid_sources[0x17]	286311	1			T1	128		T2	45		T7	2
valid_sources[0x18]	486329	1			T1	131		T2	51		T10	79
valid_sources[0x19]	292005	1			T1	64		T2	55		T7	1
valid_sources[0x1a]	293016	1			T1	109		T2	30		T9	1
valid_sources[0x1b]	290051	1			T1	93		T2	58		T7	2
valid_sources[0x1c]	287690	1			T1	75		T2	29		T10	96
valid_sources[0x1d]	287097	1			T1	119		T2	55		T7	1
valid_sources[0x1e]	289125	1			T1	128		T2	40		T10	53
valid_sources[0x1f]	286917	1			T1	62		T2	45		T10	76
valid_sources[0x20]	288870	1			T1	90		T2	52		T7	4
valid_sources[0x21]	290868	1			T1	42		T2	40		T43	2
valid_sources[0x22]	289595	1			T1	77		T2	34		T9	1
valid_sources[0x23]	290313	1			T1	86		T2	29		T9	1
valid_sources[0x24]	289388	1			T1	93		T2	37		T10	60
valid_sources[0x25]	382714	1			T1	90		T2	39		T10	59
valid_sources[0x26]	292805	1			T1	120		T2	33		T7	1
valid_sources[0x27]	293194	1			T1	82		T2	44		T9	1
valid_sources[0x28]	288396	1			T1	134		T2	46		T43	5
valid_sources[0x29]	376341	1			T1	129		T2	35		T9	1
valid_sources[0x2a]	292743	1			T1	156		T2	38		T9	1
valid_sources[0x2b]	291546	1			T1	92		T2	33		T7	5
valid_sources[0x2c]	299657	1			T1	133		T2	47		T7	1
valid_sources[0x2d]	290760	1			T1	102		T2	41		T7	4
valid_sources[0x2e]	287660	1			T1	95		T2	39		T10	55
valid_sources[0x2f]	289338	1			T1	98		T2	36		T7	1
valid_sources[0x30]	291909	1			T1	45		T2	49		T10	73
valid_sources[0x31]	290881	1			T1	97		T2	40		T10	61
valid_sources[0x32]	287917	1			T1	80		T2	49		T7	1
valid_sources[0x33]	834309	1			T1	63		T2	45		T7	2
valid_sources[0x34]	290761	1			T1	97		T2	49		T7	1
valid_sources[0x35]	434332	1			T1	67		T2	39		T43	10
valid_sources[0x36]	319454	1			T1	87		T2	47		T10	75
valid_sources[0x37]	286758	1			T1	154		T2	41		T10	64
valid_sources[0x38]	286265	1			T1	153		T2	31		T7	1
valid_sources[0x39]	291374	1			T1	79		T2	30		T9	1
valid_sources[0x3a]	290445	1			T1	115		T2	36		T10	74
valid_sources[0x3b]	389046	1			T1	47		T2	49		T9	1
valid_sources[0x3c]	291267	1			T1	73		T2	50		T10	64
valid_sources[0x3d]	287358	1			T1	107		T2	64		T9	1
valid_sources[0x3e]	292522	1			T1	116		T2	36		T10	42
valid_sources[0x3f]	289524	1			T1	113		T2	52		T7	4
valid_sources[0x40]	289139	1			T1	140		T2	40		T10	65
valid_sources[0x41]	290873	1			T1	139		T2	45		T10	63
valid_sources[0x42]	289838	1			T1	83		T2	36		T9	1
valid_sources[0x43]	288955	1			T1	63		T2	44		T10	64
valid_sources[0x44]	435830	1			T1	61		T2	48		T10	59
valid_sources[0x45]	677883	1			T1	77		T2	45		T7	1
valid_sources[0x46]	1184381	1			T1	116		T2	36		T7	2
valid_sources[0x47]	407699	1			T1	74		T2	44		T9	1
valid_sources[0x48]	322935	1			T1	68		T2	40		T10	72
valid_sources[0x49]	406123	1			T1	100		T2	47		T9	1
valid_sources[0x4a]	290807	1			T1	75		T2	33		T43	2
valid_sources[0x4b]	927647	1			T1	119		T2	38		T10	69
valid_sources[0x4c]	290078	1			T1	97		T2	52		T7	1
valid_sources[0x4d]	287914	1			T1	104		T2	51		T7	2
valid_sources[0x4e]	421419	1			T1	157		T2	56		T10	81
valid_sources[0x4f]	299483	1			T1	109		T2	50		T10	73
valid_sources[0x50]	289607	1			T1	111		T2	57		T7	2
valid_sources[0x51]	286501	1			T1	72		T2	49		T7	1
valid_sources[0x52]	289702	1			T1	164		T2	40		T9	2
valid_sources[0x53]	288912	1			T1	116		T2	46		T10	88
valid_sources[0x54]	285866	1			T1	158		T2	49		T10	72
valid_sources[0x55]	287173	1			T1	110		T2	29		T7	1
valid_sources[0x56]	289861	1			T1	46		T2	55		T7	1
valid_sources[0x57]	287916	1			T1	79		T2	46		T43	8
valid_sources[0x58]	290384	1			T1	118		T2	49		T9	1
valid_sources[0x59]	430058	1			T1	89		T2	25		T10	66
valid_sources[0x5a]	287641	1			T1	153		T2	46		T7	1
valid_sources[0x5b]	285302	1			T1	112		T2	45		T10	46
valid_sources[0x5c]	628304	1			T1	88		T2	47		T7	1
valid_sources[0x5d]	560546	1			T1	113		T2	43		T43	4
valid_sources[0x5e]	866633	1			T1	66		T2	46		T7	1
valid_sources[0x5f]	290309	1			T1	115		T2	47		T7	5
valid_sources[0x60]	423454	1			T1	67		T2	45		T10	63
valid_sources[0x61]	290435	1			T1	125		T2	39		T10	58
valid_sources[0x62]	290354	1			T1	97		T2	53		T7	3
valid_sources[0x63]	289017	1			T1	100		T2	49		T7	3
valid_sources[0x64]	292334	1			T1	119		T2	41		T7	1
valid_sources[0x65]	435654	1			T1	99		T2	43		T7	2
valid_sources[0x66]	288198	1			T1	96		T2	47		T7	3
valid_sources[0x67]	415440	1			T1	97		T2	49		T9	1
valid_sources[0x68]	287065	1			T1	116		T2	41		T10	75
valid_sources[0x69]	286028	1			T1	95		T2	48		T10	80
valid_sources[0x6a]	547672	1			T1	134		T2	44		T10	54
valid_sources[0x6b]	286099	1			T1	77		T2	39		T7	1
valid_sources[0x6c]	303158	1			T1	100		T2	36		T7	6
valid_sources[0x6d]	294497	1			T1	79		T2	48		T7	1
valid_sources[0x6e]	393538	1			T1	98		T2	32		T10	61
valid_sources[0x6f]	1244052	1			T1	116		T2	54		T9	1
valid_sources[0x70]	289421	1			T1	87		T2	62		T7	2
valid_sources[0x71]	288676	1			T1	109		T2	37		T30	855
valid_sources[0x72]	289779	1			T1	123		T2	38		T7	1
valid_sources[0x73]	288045	1			T1	95		T2	48		T9	1
valid_sources[0x74]	294516	1			T1	98		T2	46		T7	1
valid_sources[0x75]	526419	1			T1	159		T2	38		T7	3
valid_sources[0x76]	292609	1			T1	76		T2	32		T10	75
valid_sources[0x77]	295438	1			T1	56		T2	48		T7	1
valid_sources[0x78]	287329	1			T1	81		T2	41		T7	1
valid_sources[0x79]	291114	1			T1	52		T2	33		T9	1
valid_sources[0x7a]	287629	1			T1	104		T2	50		T10	73
valid_sources[0x7b]	1370614	1			T1	78		T2	41		T7	1
valid_sources[0x7c]	289556	1			T1	99		T2	48		T10	69
valid_sources[0x7d]	289567	1			T1	160		T2	44		T9	2
valid_sources[0x7e]	1407905	1			T1	159		T2	52		T9	1
valid_sources[0x7f]	287154	1			T1	149		T2	32		T9	1
valid_sources[0x80]	318797	1			T1	95		T2	41		T7	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

21232382

1

T1

12290

T2

3556

T3

3794

values[0x0]

all_enables

biggest_size

13884939

1

T1

4507

T2

1261

T3

1967

values[0x1]

all_enables

biggest_size

12486398

1

T1

4426

T2

1029

T3

1650