Unified Coverage Report :: Module :: kmac_csr_assert_fpv

Module : kmac_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_10/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_fpv_kmac_csr_assert_0/kmac_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.kmac_csr_assert	100.00						100.00

---

Module Instance : tb.dut.kmac_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.76	98.75	96.74	100.00	100.00	97.06	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : kmac_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	14	14	100.00	14	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	14	14	100.00	14	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	664550221	15489	0	0
entropy_period_rd_A	664550221	2039	0	0
intr_enable_rd_A	664550221	3015	0	0
prefix_0_rd_A	664550221	1991	0	0
prefix_10_rd_A	664550221	1955	0	0
prefix_1_rd_A	664550221	2060	0	0
prefix_2_rd_A	664550221	2046	0	0
prefix_3_rd_A	664550221	1874	0	0
prefix_4_rd_A	664550221	2003	0	0
prefix_5_rd_A	664550221	1962	0	0
prefix_6_rd_A	664550221	2149	0	0
prefix_7_rd_A	664550221	1976	0	0
prefix_8_rd_A	664550221	2096	0	0
prefix_9_rd_A	664550221	1962	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	664550221	15489	0	0
T8	30341	0	0	0
T19	3898	0	0	0
T24	8456	135	0	0
T25	6776	0	0	0
T33	242738	0	0	0
T37	0	2206	0	0
T47	109577	0	0	0
T48	7922	0	0	0
T49	4080	0	0	0
T50	2273	0	0	0
T52	0	2055	0	0
T53	0	1092	0	0
T77	0	3094	0	0
T86	1005	0	0	0
T140	0	3407	0	0
T141	0	246	0	0
T142	0	114	0	0
T143	0	5	0	0
T144	0	167	0	0

entropy_period_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	664550221	2039	0	0
T77	482405	16	0	0
T78	242765	0	0	0
T79	710062	0	0	0
T104	0	7	0	0
T105	0	23	0	0
T118	97305	0	0	0
T134	0	37	0	0
T136	0	67	0	0
T156	194717	0	0	0
T157	0	12	0	0
T158	0	38	0	0
T159	0	56	0	0
T160	0	158	0	0
T161	0	232	0	0
T162	1181	0	0	0
T163	309001	0	0	0
T164	711783	0	0	0
T165	802740	0	0	0
T166	120293	0	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	664550221	3015	0	0
T77	482405	25	0	0
T78	242765	0	0	0
T79	710062	0	0	0
T104	0	5	0	0
T105	0	36	0	0
T118	97305	0	0	0
T134	0	130	0	0
T136	0	84	0	0
T156	194717	0	0	0
T157	0	11	0	0
T158	0	33	0	0
T159	0	85	0	0
T160	0	186	0	0
T161	0	226	0	0
T162	1181	0	0	0
T163	309001	0	0	0
T164	711783	0	0	0
T165	802740	0	0	0
T166	120293	0	0	0

prefix_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	664550221	1991	0	0
T77	482405	26	0	0
T78	242765	0	0	0
T79	710062	0	0	0
T104	0	3	0	0
T105	0	16	0	0
T118	97305	0	0	0
T134	0	40	0	0
T136	0	42	0	0
T156	194717	0	0	0
T157	0	9	0	0
T158	0	46	0	0
T159	0	32	0	0
T160	0	87	0	0
T161	0	230	0	0
T162	1181	0	0	0
T163	309001	0	0	0
T164	711783	0	0	0
T165	802740	0	0	0
T166	120293	0	0	0

prefix_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	664550221	1955	0	0
T77	482405	28	0	0
T78	242765	0	0	0
T79	710062	0	0	0
T105	0	33	0	0
T118	97305	0	0	0
T134	0	44	0	0
T136	0	32	0	0
T156	194717	0	0	0
T157	0	13	0	0
T158	0	23	0	0
T159	0	75	0	0
T160	0	85	0	0
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T162	1181	0	0	0
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T164	711783	0	0	0
T165	802740	0	0	0
T166	120293	0	0	0
T167	0	224	0	0

prefix_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	664550221	2060	0	0
T77	482405	17	0	0
T78	242765	0	0	0
T79	710062	0	0	0
T104	0	8	0	0
T105	0	22	0	0
T118	97305	0	0	0
T134	0	47	0	0
T136	0	35	0	0
T156	194717	0	0	0
T157	0	9	0	0
T158	0	22	0	0
T159	0	36	0	0
T160	0	92	0	0
T161	0	210	0	0
T162	1181	0	0	0
T163	309001	0	0	0
T164	711783	0	0	0
T165	802740	0	0	0
T166	120293	0	0	0

prefix_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	664550221	2046	0	0
T77	482405	27	0	0
T78	242765	0	0	0
T79	710062	0	0	0
T104	0	2	0	0
T105	0	29	0	0
T118	97305	0	0	0
T134	0	30	0	0
T136	0	38	0	0
T156	194717	0	0	0
T157	0	8	0	0
T158	0	29	0	0
T159	0	48	0	0
T160	0	81	0	0
T161	0	207	0	0
T162	1181	0	0	0
T163	309001	0	0	0
T164	711783	0	0	0
T165	802740	0	0	0
T166	120293	0	0	0

prefix_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	664550221	1874	0	0
T77	482405	18	0	0
T78	242765	0	0	0
T79	710062	0	0	0
T104	0	7	0	0
T105	0	34	0	0
T118	97305	0	0	0
T134	0	43	0	0
T136	0	38	0	0
T156	194717	0	0	0
T157	0	3	0	0
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T159	0	30	0	0
T160	0	87	0	0
T161	0	195	0	0
T162	1181	0	0	0
T163	309001	0	0	0
T164	711783	0	0	0
T165	802740	0	0	0
T166	120293	0	0	0

prefix_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	664550221	2003	0	0
T77	482405	20	0	0
T78	242765	0	0	0
T79	710062	0	0	0
T104	0	10	0	0
T105	0	19	0	0
T118	97305	0	0	0
T134	0	47	0	0
T136	0	44	0	0
T156	194717	0	0	0
T157	0	4	0	0
T158	0	14	0	0
T159	0	29	0	0
T160	0	99	0	0
T161	0	238	0	0
T162	1181	0	0	0
T163	309001	0	0	0
T164	711783	0	0	0
T165	802740	0	0	0
T166	120293	0	0	0

prefix_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	664550221	1962	0	0
T77	482405	7	0	0
T78	242765	0	0	0
T79	710062	0	0	0
T104	0	3	0	0
T105	0	29	0	0
T118	97305	0	0	0
T134	0	32	0	0
T136	0	29	0	0
T156	194717	0	0	0
T157	0	2	0	0
T158	0	20	0	0
T159	0	62	0	0
T160	0	72	0	0
T161	0	221	0	0
T162	1181	0	0	0
T163	309001	0	0	0
T164	711783	0	0	0
T165	802740	0	0	0
T166	120293	0	0	0

prefix_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	664550221	2149	0	0
T77	482405	34	0	0
T78	242765	0	0	0
T79	710062	0	0	0
T104	0	1	0	0
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prefix_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	664550221	1976	0	0
T77	482405	41	0	0
T78	242765	0	0	0
T79	710062	0	0	0
T105	0	35	0	0
T118	97305	0	0	0
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T136	0	40	0	0
T156	194717	0	0	0
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T164	711783	0	0	0
T165	802740	0	0	0
T166	120293	0	0	0
T167	0	236	0	0

prefix_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	664550221	2096	0	0
T77	482405	8	0	0
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T79	710062	0	0	0
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prefix_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	664550221	1962	0	0
T77	482405	25	0	0
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