Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
182775 |
1 |
|
|
T9 |
217 |
|
T4 |
186 |
|
T5 |
1770 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
105064 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
52851 |
1 |
|
|
T9 |
214 |
|
T4 |
182 |
|
T5 |
1740 |
seven_bytes |
3634 |
1 |
|
|
T13 |
40 |
|
T15 |
51 |
|
T16 |
66 |
six_bytes |
3536 |
1 |
|
|
T13 |
44 |
|
T15 |
37 |
|
T16 |
68 |
five_bytes |
3500 |
1 |
|
|
T13 |
40 |
|
T15 |
45 |
|
T16 |
53 |
four_bytes |
3642 |
1 |
|
|
T13 |
46 |
|
T15 |
50 |
|
T16 |
78 |
three_bytes |
3567 |
1 |
|
|
T13 |
47 |
|
T15 |
44 |
|
T16 |
60 |
two_bytes |
3455 |
1 |
|
|
T13 |
41 |
|
T15 |
38 |
|
T16 |
54 |
one_byte |
3526 |
1 |
|
|
T13 |
51 |
|
T15 |
54 |
|
T16 |
68 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
179591 |
1 |
|
|
T9 |
211 |
|
T4 |
178 |
|
T5 |
1710 |
auto[1] |
3184 |
1 |
|
|
T9 |
6 |
|
T4 |
8 |
|
T5 |
60 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
182775 |
1 |
|
|
T9 |
217 |
|
T4 |
186 |
|
T5 |
1770 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
182765 |
1 |
|
|
T9 |
217 |
|
T4 |
186 |
|
T5 |
1770 |
auto[1] |
10 |
1 |
|
|
T6 |
1 |
|
T23 |
1 |
|
T42 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1000 |
1 |
|
|
T9 |
3 |
|
T4 |
4 |
|
T5 |
30 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3184 |
1 |
|
|
T9 |
6 |
|
T4 |
8 |
|
T5 |
60 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
173717 |
1 |
|
|
T9 |
119 |
|
T4 |
125 |
|
T5 |
1543 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
98923 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
51133 |
1 |
|
|
T9 |
118 |
|
T4 |
123 |
|
T5 |
1513 |
seven_bytes |
3404 |
1 |
|
|
T13 |
80 |
|
T14 |
9 |
|
T15 |
35 |
six_bytes |
3477 |
1 |
|
|
T13 |
70 |
|
T14 |
8 |
|
T15 |
31 |
five_bytes |
3392 |
1 |
|
|
T13 |
62 |
|
T14 |
13 |
|
T15 |
41 |
four_bytes |
3350 |
1 |
|
|
T13 |
57 |
|
T14 |
6 |
|
T15 |
28 |
three_bytes |
3429 |
1 |
|
|
T13 |
56 |
|
T14 |
4 |
|
T15 |
38 |
two_bytes |
3299 |
1 |
|
|
T13 |
74 |
|
T14 |
4 |
|
T15 |
31 |
one_byte |
3310 |
1 |
|
|
T13 |
55 |
|
T14 |
4 |
|
T15 |
27 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
170547 |
1 |
|
|
T9 |
117 |
|
T4 |
121 |
|
T5 |
1483 |
auto[1] |
3170 |
1 |
|
|
T9 |
2 |
|
T4 |
4 |
|
T5 |
60 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
173717 |
1 |
|
|
T9 |
119 |
|
T4 |
125 |
|
T5 |
1543 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
173700 |
1 |
|
|
T9 |
119 |
|
T4 |
125 |
|
T5 |
1543 |
auto[1] |
17 |
1 |
|
|
T62 |
2 |
|
T115 |
1 |
|
T167 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1009 |
1 |
|
|
T9 |
1 |
|
T4 |
2 |
|
T5 |
30 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3170 |
1 |
|
|
T9 |
2 |
|
T4 |
4 |
|
T5 |
60 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
337897 |
1 |
|
|
T10 |
2 |
|
T9 |
160 |
|
T4 |
194 |
auto[1] |
226 |
1 |
|
|
T4 |
3 |
|
T5 |
50 |
|
T6 |
60 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
190153 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
102794 |
1 |
|
|
T10 |
2 |
|
T9 |
157 |
|
T4 |
194 |
seven_bytes |
6460 |
1 |
|
|
T13 |
73 |
|
T15 |
160 |
|
T16 |
90 |
six_bytes |
6599 |
1 |
|
|
T13 |
63 |
|
T15 |
140 |
|
T16 |
84 |
five_bytes |
6588 |
1 |
|
|
T13 |
78 |
|
T15 |
144 |
|
T16 |
105 |
four_bytes |
6515 |
1 |
|
|
T13 |
83 |
|
T15 |
143 |
|
T16 |
107 |
three_bytes |
6493 |
1 |
|
|
T13 |
64 |
|
T15 |
135 |
|
T16 |
84 |
two_bytes |
6167 |
1 |
|
|
T13 |
58 |
|
T15 |
135 |
|
T16 |
88 |
one_byte |
6354 |
1 |
|
|
T13 |
72 |
|
T15 |
124 |
|
T16 |
93 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
331993 |
1 |
|
|
T10 |
2 |
|
T9 |
154 |
|
T4 |
191 |
auto[1] |
6130 |
1 |
|
|
T9 |
6 |
|
T4 |
6 |
|
T5 |
100 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
338123 |
1 |
|
|
T10 |
2 |
|
T9 |
160 |
|
T4 |
197 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
338096 |
1 |
|
|
T10 |
2 |
|
T9 |
160 |
|
T4 |
197 |
auto[1] |
27 |
1 |
|
|
T13 |
1 |
|
T6 |
1 |
|
T23 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1967 |
1 |
|
|
T9 |
3 |
|
T4 |
3 |
|
T5 |
50 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6130 |
1 |
|
|
T9 |
6 |
|
T4 |
6 |
|
T5 |
100 |