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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
94.14 97.90 92.65 99.89 76.06 95.57 99.07 97.88


Total test records in report: 881
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html

T557 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/30.kmac_stress_all.401630699 Oct 03 03:16:54 AM UTC 24 Oct 03 03:31:29 AM UTC 24 26337223363 ps
T558 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/23.kmac_stress_all.822239108 Oct 03 03:01:54 AM UTC 24 Oct 03 03:31:34 AM UTC 24 305419371390 ps
T559 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/38.kmac_key_error.780277859 Oct 03 03:31:29 AM UTC 24 Oct 03 03:31:48 AM UTC 24 2081120930 ps
T560 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/38.kmac_alert_test.739257922 Oct 03 03:31:49 AM UTC 24 Oct 03 03:31:51 AM UTC 24 39346915 ps
T561 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/37.kmac_error.1280736669 Oct 03 03:29:31 AM UTC 24 Oct 03 03:32:01 AM UTC 24 17968446447 ps
T562 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/39.kmac_smoke.1026380038 Oct 03 03:31:52 AM UTC 24 Oct 03 03:32:03 AM UTC 24 166573361 ps
T563 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/24.kmac_long_msg_and_output.3523215923 Oct 03 03:02:46 AM UTC 24 Oct 03 03:32:06 AM UTC 24 50877445315 ps
T49 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/38.kmac_lc_escalation.2818515888 Oct 03 03:31:30 AM UTC 24 Oct 03 03:32:26 AM UTC 24 708070240 ps
T564 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/23.kmac_burst_write.3402807530 Oct 03 03:00:28 AM UTC 24 Oct 03 03:32:49 AM UTC 24 57120545702 ps
T565 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/37.kmac_app.1714016211 Oct 03 03:29:08 AM UTC 24 Oct 03 03:32:53 AM UTC 24 5760889951 ps
T566 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/38.kmac_error.3329564826 Oct 03 03:31:22 AM UTC 24 Oct 03 03:33:08 AM UTC 24 2048719261 ps
T567 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/39.kmac_key_error.1231414960 Oct 03 03:33:08 AM UTC 24 Oct 03 03:33:20 AM UTC 24 737929479 ps
T568 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/39.kmac_lc_escalation.3932395023 Oct 03 03:33:21 AM UTC 24 Oct 03 03:33:24 AM UTC 24 202324710 ps
T569 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/35.kmac_error.1573452827 Oct 03 03:26:04 AM UTC 24 Oct 03 03:33:51 AM UTC 24 11532354652 ps
T570 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/39.kmac_alert_test.311913530 Oct 03 03:33:52 AM UTC 24 Oct 03 03:33:54 AM UTC 24 13596735 ps
T571 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/37.kmac_entropy_refresh.1456011703 Oct 03 03:29:29 AM UTC 24 Oct 03 03:34:02 AM UTC 24 26841822152 ps
T572 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/39.kmac_entropy_refresh.1149153435 Oct 03 03:32:50 AM UTC 24 Oct 03 03:34:17 AM UTC 24 1726667195 ps
T573 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/37.kmac_sideload.889212888 Oct 03 03:28:56 AM UTC 24 Oct 03 03:34:25 AM UTC 24 19617584316 ps
T574 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/40.kmac_smoke.213568448 Oct 03 03:33:55 AM UTC 24 Oct 03 03:34:41 AM UTC 24 3077469807 ps
T575 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/32.kmac_burst_write.2096611497 Oct 03 03:19:48 AM UTC 24 Oct 03 03:34:59 AM UTC 24 30478740659 ps
T576 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/35.kmac_burst_write.843140268 Oct 03 03:25:47 AM UTC 24 Oct 03 03:35:09 AM UTC 24 17661928400 ps
T577 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/7.kmac_long_msg_and_output.4118672075 Oct 03 02:21:16 AM UTC 24 Oct 03 03:35:21 AM UTC 24 414686987711 ps
T578 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/35.kmac_sideload.3263172674 Oct 03 03:25:21 AM UTC 24 Oct 03 03:35:29 AM UTC 24 30570209574 ps
T579 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/40.kmac_lc_escalation.2821397733 Oct 03 03:35:31 AM UTC 24 Oct 03 03:35:36 AM UTC 24 209814996 ps
T580 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/39.kmac_app.2659961275 Oct 03 03:32:27 AM UTC 24 Oct 03 03:35:41 AM UTC 24 8302702272 ps
T581 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/37.kmac_burst_write.4019582484 Oct 03 03:28:58 AM UTC 24 Oct 03 03:35:42 AM UTC 24 24230558163 ps
T582 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/40.kmac_alert_test.2474204965 Oct 03 03:35:42 AM UTC 24 Oct 03 03:35:44 AM UTC 24 22874036 ps
T583 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/40.kmac_key_error.2042418127 Oct 03 03:35:22 AM UTC 24 Oct 03 03:35:55 AM UTC 24 15985617651 ps
T584 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/40.kmac_error.2565451938 Oct 03 03:35:10 AM UTC 24 Oct 03 03:36:11 AM UTC 24 2037265068 ps
T585 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/40.kmac_app.2579357577 Oct 03 03:34:43 AM UTC 24 Oct 03 03:36:42 AM UTC 24 3802719802 ps
T586 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/27.kmac_burst_write.3507713305 Oct 03 03:09:34 AM UTC 24 Oct 03 03:36:43 AM UTC 24 17514902020 ps
T587 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/49.kmac_smoke.823939128 Oct 03 03:53:12 AM UTC 24 Oct 03 03:54:21 AM UTC 24 5821553566 ps
T588 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/23.kmac_long_msg_and_output.944048830 Oct 03 03:00:02 AM UTC 24 Oct 03 03:37:09 AM UTC 24 184463106466 ps
T589 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/41.kmac_smoke.2147782439 Oct 03 03:35:43 AM UTC 24 Oct 03 03:37:15 AM UTC 24 1676951236 ps
T590 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/36.kmac_error.3315686850 Oct 03 03:28:18 AM UTC 24 Oct 03 03:37:24 AM UTC 24 85788293170 ps
T591 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/41.kmac_key_error.3506436307 Oct 03 03:37:17 AM UTC 24 Oct 03 03:37:27 AM UTC 24 2764884165 ps
T592 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/41.kmac_lc_escalation.1197443827 Oct 03 03:37:25 AM UTC 24 Oct 03 03:37:29 AM UTC 24 50515093 ps
T593 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/38.kmac_entropy_refresh.1003523940 Oct 03 03:31:16 AM UTC 24 Oct 03 03:37:30 AM UTC 24 22597773449 ps
T594 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/41.kmac_alert_test.325892386 Oct 03 03:37:30 AM UTC 24 Oct 03 03:37:32 AM UTC 24 40333094 ps
T595 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/39.kmac_sideload.3919117226 Oct 03 03:32:04 AM UTC 24 Oct 03 03:37:39 AM UTC 24 8977838366 ps
T596 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/39.kmac_error.1125596444 Oct 03 03:32:54 AM UTC 24 Oct 03 03:38:09 AM UTC 24 9659301563 ps
T597 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/42.kmac_smoke.29647569 Oct 03 03:37:31 AM UTC 24 Oct 03 03:38:25 AM UTC 24 1160617797 ps
T598 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/34.kmac_stress_all.952061391 Oct 03 03:24:49 AM UTC 24 Oct 03 03:38:37 AM UTC 24 23280981392 ps
T599 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/25.kmac_long_msg_and_output.1304424656 Oct 03 03:04:55 AM UTC 24 Oct 03 03:38:41 AM UTC 24 83763779098 ps
T600 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/40.kmac_long_msg_and_output.2022302391 Oct 03 03:34:03 AM UTC 24 Oct 03 03:38:50 AM UTC 24 7931776333 ps
T601 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/39.kmac_burst_write.688153860 Oct 03 03:32:08 AM UTC 24 Oct 03 03:39:01 AM UTC 24 8703764702 ps
T55 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/42.kmac_lc_escalation.2584550904 Oct 03 03:39:02 AM UTC 24 Oct 03 03:39:05 AM UTC 24 102649193 ps
T602 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/42.kmac_key_error.3864793385 Oct 03 03:38:51 AM UTC 24 Oct 03 03:39:08 AM UTC 24 1144920382 ps
T603 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/42.kmac_alert_test.1303681237 Oct 03 03:39:09 AM UTC 24 Oct 03 03:39:11 AM UTC 24 43170482 ps
T604 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/42.kmac_sideload.135833931 Oct 03 03:37:41 AM UTC 24 Oct 03 03:39:12 AM UTC 24 14815151941 ps
T605 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/42.kmac_app.353061274 Oct 03 03:38:25 AM UTC 24 Oct 03 03:39:17 AM UTC 24 3647061610 ps
T606 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/38.kmac_burst_write.2640970667 Oct 03 03:31:09 AM UTC 24 Oct 03 03:40:07 AM UTC 24 12178845892 ps
T607 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/43.kmac_smoke.4274207935 Oct 03 03:39:13 AM UTC 24 Oct 03 03:40:21 AM UTC 24 4384145073 ps
T608 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/41.kmac_entropy_refresh.3409091369 Oct 03 03:36:44 AM UTC 24 Oct 03 03:40:35 AM UTC 24 33530605354 ps
T609 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/42.kmac_entropy_refresh.1785854212 Oct 03 03:38:38 AM UTC 24 Oct 03 03:40:56 AM UTC 24 14287015571 ps
T610 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/42.kmac_stress_all.2107235395 Oct 03 03:39:06 AM UTC 24 Oct 03 03:41:09 AM UTC 24 11358709649 ps
T611 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/43.kmac_key_error.1911568658 Oct 03 03:41:10 AM UTC 24 Oct 03 03:41:17 AM UTC 24 4587813368 ps
T612 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/43.kmac_app.2753077854 Oct 03 03:40:22 AM UTC 24 Oct 03 03:41:21 AM UTC 24 1339481203 ps
T78 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/43.kmac_lc_escalation.3342597599 Oct 03 03:41:18 AM UTC 24 Oct 03 03:41:21 AM UTC 24 84604478 ps
T613 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/43.kmac_sideload.2181898258 Oct 03 03:39:18 AM UTC 24 Oct 03 03:41:21 AM UTC 24 5899760739 ps
T614 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/43.kmac_alert_test.1908721459 Oct 03 03:41:22 AM UTC 24 Oct 03 03:41:24 AM UTC 24 28339519 ps
T615 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/29.kmac_burst_write.2527921835 Oct 03 03:13:55 AM UTC 24 Oct 03 03:41:27 AM UTC 24 170180352405 ps
T616 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/41.kmac_app.3267586340 Oct 03 03:36:43 AM UTC 24 Oct 03 03:41:33 AM UTC 24 29813254457 ps
T617 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/40.kmac_sideload.3033153636 Oct 03 03:34:17 AM UTC 24 Oct 03 03:41:38 AM UTC 24 5037524405 ps
T618 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/32.kmac_stress_all.510072126 Oct 03 03:21:34 AM UTC 24 Oct 03 03:41:56 AM UTC 24 145022274577 ps
T619 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/43.kmac_entropy_refresh.3683259408 Oct 03 03:40:36 AM UTC 24 Oct 03 03:41:59 AM UTC 24 9566320441 ps
T620 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/42.kmac_error.132652754 Oct 03 03:38:43 AM UTC 24 Oct 03 03:42:04 AM UTC 24 15584630440 ps
T621 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/35.kmac_stress_all.691876923 Oct 03 03:26:21 AM UTC 24 Oct 03 03:42:18 AM UTC 24 63443229937 ps
T622 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/40.kmac_entropy_refresh.93937869 Oct 03 03:35:00 AM UTC 24 Oct 03 03:42:23 AM UTC 24 31304132649 ps
T623 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/44.kmac_lc_escalation.3618599284 Oct 03 03:42:20 AM UTC 24 Oct 03 03:42:24 AM UTC 24 58009192 ps
T624 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/44.kmac_alert_test.399238642 Oct 03 03:42:25 AM UTC 24 Oct 03 03:42:27 AM UTC 24 26349826 ps
T625 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/44.kmac_key_error.3934111288 Oct 03 03:42:05 AM UTC 24 Oct 03 03:42:30 AM UTC 24 14964560108 ps
T626 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/44.kmac_smoke.2167023440 Oct 03 03:41:22 AM UTC 24 Oct 03 03:42:46 AM UTC 24 22731085889 ps
T627 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/45.kmac_sideload.2295899834 Oct 03 03:42:48 AM UTC 24 Oct 03 03:43:16 AM UTC 24 758074981 ps
T628 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/45.kmac_smoke.1554019337 Oct 03 03:42:28 AM UTC 24 Oct 03 03:43:58 AM UTC 24 2368755296 ps
T629 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/41.kmac_sideload.4036276770 Oct 03 03:35:55 AM UTC 24 Oct 03 03:44:40 AM UTC 24 9238754839 ps
T630 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/44.kmac_entropy_refresh.1776267887 Oct 03 03:41:57 AM UTC 24 Oct 03 03:45:00 AM UTC 24 11998257725 ps
T631 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/45.kmac_app.3990061153 Oct 03 03:44:00 AM UTC 24 Oct 03 03:45:03 AM UTC 24 2682397127 ps
T632 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/45.kmac_key_error.3462921243 Oct 03 03:45:04 AM UTC 24 Oct 03 03:45:12 AM UTC 24 1144354613 ps
T633 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/44.kmac_sideload.1509019326 Oct 03 03:41:28 AM UTC 24 Oct 03 03:45:23 AM UTC 24 32165537163 ps
T634 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/45.kmac_lc_escalation.522831007 Oct 03 03:45:13 AM UTC 24 Oct 03 03:45:42 AM UTC 24 2992791785 ps
T635 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/45.kmac_alert_test.4097527639 Oct 03 03:45:43 AM UTC 24 Oct 03 03:45:45 AM UTC 24 40798828 ps
T636 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/44.kmac_app.4156619987 Oct 03 03:41:39 AM UTC 24 Oct 03 03:45:56 AM UTC 24 19041757523 ps
T637 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/44.kmac_burst_write.235386958 Oct 03 03:41:35 AM UTC 24 Oct 03 03:46:04 AM UTC 24 13010901295 ps
T638 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/46.kmac_smoke.900808303 Oct 03 03:45:46 AM UTC 24 Oct 03 03:46:45 AM UTC 24 1038796956 ps
T639 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/42.kmac_burst_write.3152188431 Oct 03 03:38:10 AM UTC 24 Oct 03 03:46:54 AM UTC 24 13018053957 ps
T640 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/37.kmac_stress_all.3220851846 Oct 03 03:30:00 AM UTC 24 Oct 03 03:46:55 AM UTC 24 55723955722 ps
T641 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/12.kmac_long_msg_and_output.1895778654 Oct 03 02:36:47 AM UTC 24 Oct 03 03:46:57 AM UTC 24 161595198388 ps
T642 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/44.kmac_error.3236973656 Oct 03 03:42:00 AM UTC 24 Oct 03 03:47:09 AM UTC 24 160054328400 ps
T643 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/46.kmac_key_error.1071632141 Oct 03 03:47:09 AM UTC 24 Oct 03 03:47:15 AM UTC 24 464423254 ps
T50 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/46.kmac_lc_escalation.3250411617 Oct 03 03:47:16 AM UTC 24 Oct 03 03:47:51 AM UTC 24 3836669286 ps
T644 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/45.kmac_entropy_refresh.3218701245 Oct 03 03:44:42 AM UTC 24 Oct 03 03:48:22 AM UTC 24 27322205814 ps
T645 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/46.kmac_alert_test.1720042263 Oct 03 03:48:23 AM UTC 24 Oct 03 03:48:25 AM UTC 24 25745423 ps
T646 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/41.kmac_error.2657107292 Oct 03 03:37:09 AM UTC 24 Oct 03 03:49:02 AM UTC 24 18776659907 ps
T647 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/43.kmac_error.1006583815 Oct 03 03:40:57 AM UTC 24 Oct 03 03:49:21 AM UTC 24 16190380245 ps
T648 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/45.kmac_long_msg_and_output.2247222003 Oct 03 03:42:31 AM UTC 24 Oct 03 03:49:28 AM UTC 24 16206560327 ps
T649 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/45.kmac_burst_write.2682973704 Oct 03 03:43:17 AM UTC 24 Oct 03 03:49:46 AM UTC 24 6475334274 ps
T650 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/40.kmac_stress_all.2585297780 Oct 03 03:35:37 AM UTC 24 Oct 03 03:49:57 AM UTC 24 65641645488 ps
T651 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/47.kmac_smoke.4103875038 Oct 03 03:48:27 AM UTC 24 Oct 03 03:50:11 AM UTC 24 10101262820 ps
T652 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/31.kmac_long_msg_and_output.33599278 Oct 03 03:17:39 AM UTC 24 Oct 03 03:50:42 AM UTC 24 313848004438 ps
T653 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/47.kmac_key_error.1648222365 Oct 03 03:50:42 AM UTC 24 Oct 03 03:51:03 AM UTC 24 1485751177 ps
T654 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/47.kmac_lc_escalation.2596323384 Oct 03 03:51:04 AM UTC 24 Oct 03 03:51:06 AM UTC 24 101018166 ps
T655 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/39.kmac_stress_all.312369495 Oct 03 03:33:25 AM UTC 24 Oct 03 03:51:14 AM UTC 24 78379160400 ps
T656 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/47.kmac_alert_test.2015426041 Oct 03 03:51:15 AM UTC 24 Oct 03 03:51:17 AM UTC 24 28957291 ps
T657 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/46.kmac_burst_write.4268096426 Oct 03 03:46:46 AM UTC 24 Oct 03 03:51:33 AM UTC 24 4692324081 ps
T658 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/46.kmac_app.1300168708 Oct 03 03:46:55 AM UTC 24 Oct 03 03:51:39 AM UTC 24 9010466607 ps
T659 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/48.kmac_smoke.631273240 Oct 03 03:51:18 AM UTC 24 Oct 03 03:51:42 AM UTC 24 464012150 ps
T660 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/48.kmac_sideload.2114223471 Oct 03 03:51:40 AM UTC 24 Oct 03 03:52:18 AM UTC 24 8331642602 ps
T661 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/46.kmac_entropy_refresh.756716683 Oct 03 03:46:56 AM UTC 24 Oct 03 03:52:23 AM UTC 24 46925578814 ps
T662 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/47.kmac_app.3594025343 Oct 03 03:49:48 AM UTC 24 Oct 03 03:52:50 AM UTC 24 3980897487 ps
T663 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/33.kmac_stress_all.2062596648 Oct 03 03:23:15 AM UTC 24 Oct 03 03:52:51 AM UTC 24 21322441305 ps
T664 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/45.kmac_error.2281872235 Oct 03 03:45:02 AM UTC 24 Oct 03 03:53:00 AM UTC 24 45759057430 ps
T665 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/36.kmac_burst_write.2688786905 Oct 03 03:27:29 AM UTC 24 Oct 03 03:53:03 AM UTC 24 28499653105 ps
T94 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/48.kmac_key_error.598139127 Oct 03 03:52:52 AM UTC 24 Oct 03 03:53:07 AM UTC 24 1137614675 ps
T666 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/48.kmac_alert_test.3717248599 Oct 03 03:53:09 AM UTC 24 Oct 03 03:53:11 AM UTC 24 19823099 ps
T667 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/47.kmac_entropy_refresh.1094670641 Oct 03 03:49:58 AM UTC 24 Oct 03 03:53:19 AM UTC 24 4843334123 ps
T668 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/48.kmac_lc_escalation.3458191734 Oct 03 03:53:01 AM UTC 24 Oct 03 03:53:21 AM UTC 24 814061417 ps
T669 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/26.kmac_long_msg_and_output.3305689640 Oct 03 03:06:58 AM UTC 24 Oct 03 03:53:32 AM UTC 24 62476155647 ps
T670 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/49.kmac_sideload.1592153465 Oct 03 03:53:22 AM UTC 24 Oct 03 03:53:47 AM UTC 24 728405891 ps
T671 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/48.kmac_app.1621062898 Oct 03 03:52:19 AM UTC 24 Oct 03 03:53:47 AM UTC 24 3085886607 ps
T672 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/46.kmac_sideload.3714278515 Oct 03 03:46:04 AM UTC 24 Oct 03 03:53:48 AM UTC 24 55740569838 ps
T673 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/43.kmac_long_msg_and_output.839501076 Oct 03 03:39:13 AM UTC 24 Oct 03 03:54:18 AM UTC 24 7825818804 ps
T674 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/49.kmac_key_error.3200136067 Oct 03 03:54:19 AM UTC 24 Oct 03 03:54:23 AM UTC 24 70692767 ps
T675 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/46.kmac_error.2430406144 Oct 03 03:46:58 AM UTC 24 Oct 03 03:54:23 AM UTC 24 35325374512 ps
T676 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/49.kmac_lc_escalation.1578244284 Oct 03 03:54:22 AM UTC 24 Oct 03 03:54:25 AM UTC 24 66365895 ps
T677 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/49.kmac_alert_test.323689408 Oct 03 03:54:24 AM UTC 24 Oct 03 03:54:26 AM UTC 24 63056822 ps
T678 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/49.kmac_error.2575443103 Oct 03 03:53:49 AM UTC 24 Oct 03 03:54:32 AM UTC 24 4689823223 ps
T679 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/48.kmac_entropy_refresh.3308211236 Oct 03 03:52:24 AM UTC 24 Oct 03 03:54:43 AM UTC 24 4036784319 ps
T680 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/49.kmac_entropy_refresh.4071229006 Oct 03 03:53:49 AM UTC 24 Oct 03 03:56:36 AM UTC 24 4374018158 ps
T681 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/36.kmac_stress_all.1107037239 Oct 03 03:28:41 AM UTC 24 Oct 03 03:56:52 AM UTC 24 40576641045 ps
T682 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/47.kmac_sideload.4209115627 Oct 03 03:49:22 AM UTC 24 Oct 03 03:57:04 AM UTC 24 5379097783 ps
T683 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/49.kmac_app.4181146531 Oct 03 03:53:48 AM UTC 24 Oct 03 03:57:28 AM UTC 24 16368274930 ps
T684 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/37.kmac_long_msg_and_output.4257754467 Oct 03 03:28:50 AM UTC 24 Oct 03 03:57:33 AM UTC 24 30021270359 ps
T685 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/47.kmac_long_msg_and_output.4248538227 Oct 03 03:49:03 AM UTC 24 Oct 03 03:57:59 AM UTC 24 81879197422 ps
T686 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/43.kmac_stress_all.336593423 Oct 03 03:41:22 AM UTC 24 Oct 03 03:58:17 AM UTC 24 33619382815 ps
T687 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/40.kmac_burst_write.148647921 Oct 03 03:34:27 AM UTC 24 Oct 03 03:59:12 AM UTC 24 25678709510 ps
T688 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/48.kmac_error.2755872950 Oct 03 03:52:51 AM UTC 24 Oct 03 04:00:27 AM UTC 24 18689768586 ps
T689 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/47.kmac_burst_write.2036947054 Oct 03 03:49:29 AM UTC 24 Oct 03 04:00:50 AM UTC 24 28854107532 ps
T690 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/49.kmac_stress_all.2054082577 Oct 03 03:54:24 AM UTC 24 Oct 03 04:01:00 AM UTC 24 36585109385 ps
T691 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/41.kmac_burst_write.547739196 Oct 03 03:36:13 AM UTC 24 Oct 03 04:02:07 AM UTC 24 82079860081 ps
T692 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/29.kmac_long_msg_and_output.3338907343 Oct 03 03:12:49 AM UTC 24 Oct 03 04:02:21 AM UTC 24 131503888369 ps
T693 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/47.kmac_error.2570417098 Oct 03 03:50:12 AM UTC 24 Oct 03 04:02:38 AM UTC 24 18685186158 ps
T694 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/49.kmac_burst_write.1688546148 Oct 03 03:53:34 AM UTC 24 Oct 03 04:05:02 AM UTC 24 113471155848 ps
T695 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/48.kmac_stress_all.1772419592 Oct 03 03:53:04 AM UTC 24 Oct 03 04:05:10 AM UTC 24 10054337757 ps
T696 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/49.kmac_long_msg_and_output.2807641335 Oct 03 03:53:19 AM UTC 24 Oct 03 04:05:52 AM UTC 24 16803466402 ps
T697 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/43.kmac_burst_write.1261338697 Oct 03 03:40:08 AM UTC 24 Oct 03 04:06:09 AM UTC 24 169417709544 ps
T698 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/27.kmac_stress_all.1816129252 Oct 03 03:10:53 AM UTC 24 Oct 03 04:07:08 AM UTC 24 112205329641 ps
T699 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/18.kmac_stress_all.561012324 Oct 03 02:51:03 AM UTC 24 Oct 03 04:08:51 AM UTC 24 174331612116 ps
T700 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/47.kmac_stress_all.2628301190 Oct 03 03:51:08 AM UTC 24 Oct 03 04:10:17 AM UTC 24 54032807284 ps
T701 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/36.kmac_long_msg_and_output.312050510 Oct 03 03:26:56 AM UTC 24 Oct 03 04:11:07 AM UTC 24 250643587837 ps
T702 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/34.kmac_long_msg_and_output.1666081024 Oct 03 03:23:22 AM UTC 24 Oct 03 04:11:28 AM UTC 24 90870898437 ps
T703 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/16.kmac_long_msg_and_output.409631353 Oct 03 02:43:44 AM UTC 24 Oct 03 04:11:38 AM UTC 24 465934147770 ps
T704 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/38.kmac_long_msg_and_output.231138182 Oct 03 03:30:16 AM UTC 24 Oct 03 04:12:21 AM UTC 24 91794529684 ps
T705 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/41.kmac_long_msg_and_output.445342859 Oct 03 03:35:45 AM UTC 24 Oct 03 04:12:31 AM UTC 24 47538639535 ps
T706 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/27.kmac_long_msg_and_output.3548334277 Oct 03 03:08:50 AM UTC 24 Oct 03 04:12:50 AM UTC 24 110741716182 ps
T707 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/48.kmac_long_msg_and_output.3106791736 Oct 03 03:51:34 AM UTC 24 Oct 03 04:12:51 AM UTC 24 10611643856 ps
T708 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/33.kmac_long_msg_and_output.2092451410 Oct 03 03:21:57 AM UTC 24 Oct 03 04:14:20 AM UTC 24 51179169597 ps
T709 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/39.kmac_long_msg_and_output.1710192669 Oct 03 03:32:01 AM UTC 24 Oct 03 04:15:18 AM UTC 24 109333129042 ps
T710 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/32.kmac_long_msg_and_output.4211764171 Oct 03 03:19:17 AM UTC 24 Oct 03 04:15:19 AM UTC 24 27384990203 ps
T711 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/48.kmac_burst_write.154556216 Oct 03 03:51:43 AM UTC 24 Oct 03 04:15:39 AM UTC 24 149774800546 ps
T712 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/46.kmac_long_msg_and_output.2079091392 Oct 03 03:45:57 AM UTC 24 Oct 03 04:16:55 AM UTC 24 16092382097 ps
T713 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/38.kmac_stress_all.207247877 Oct 03 03:31:35 AM UTC 24 Oct 03 04:18:40 AM UTC 24 264950411402 ps
T714 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/41.kmac_stress_all.2787651943 Oct 03 03:37:28 AM UTC 24 Oct 03 04:19:39 AM UTC 24 122289328529 ps
T715 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/45.kmac_stress_all.462317458 Oct 03 03:45:23 AM UTC 24 Oct 03 04:28:07 AM UTC 24 78971038047 ps
T716 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/44.kmac_stress_all.3566755496 Oct 03 03:42:24 AM UTC 24 Oct 03 04:29:11 AM UTC 24 323063170244 ps
T717 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/46.kmac_stress_all.2879184808 Oct 03 03:47:52 AM UTC 24 Oct 03 04:32:55 AM UTC 24 285229508774 ps
T718 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/42.kmac_long_msg_and_output.1829191884 Oct 03 03:37:33 AM UTC 24 Oct 03 04:33:58 AM UTC 24 177493066191 ps
T719 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/21.kmac_long_msg_and_output.148739993 Oct 03 02:55:53 AM UTC 24 Oct 03 04:36:06 AM UTC 24 609368406985 ps
T720 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/default/44.kmac_long_msg_and_output.984529152 Oct 03 03:41:25 AM UTC 24 Oct 03 04:43:57 AM UTC 24 27724060109 ps
T721 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/0.kmac_mem_walk.3916365264 Oct 02 11:17:53 PM UTC 24 Oct 02 11:17:55 PM UTC 24 21069392 ps
T139 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/0.kmac_mem_partial_access.3511358884 Oct 02 11:17:53 PM UTC 24 Oct 02 11:17:56 PM UTC 24 31492492 ps
T132 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/0.kmac_tl_errors.1019529268 Oct 02 11:17:53 PM UTC 24 Oct 02 11:17:57 PM UTC 24 101666646 ps
T722 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/1.kmac_mem_walk.89792274 Oct 02 11:17:59 PM UTC 24 Oct 02 11:18:01 PM UTC 24 32781179 ps
T140 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/1.kmac_mem_partial_access.4007607305 Oct 02 11:17:59 PM UTC 24 Oct 02 11:18:02 PM UTC 24 24155670 ps
T133 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/1.kmac_tl_errors.901455755 Oct 02 11:17:59 PM UTC 24 Oct 02 11:18:02 PM UTC 24 289683529 ps
T104 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/1.kmac_shadow_reg_errors_with_csr_rw.2919692933 Oct 02 11:17:59 PM UTC 24 Oct 02 11:18:03 PM UTC 24 151842178 ps
T128 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/0.kmac_intr_test.3585171716 Oct 02 11:17:57 PM UTC 24 Oct 02 11:18:05 PM UTC 24 26413500 ps
T129 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/0.kmac_csr_hw_reset.1342340111 Oct 02 11:17:57 PM UTC 24 Oct 02 11:18:05 PM UTC 24 64292665 ps
T149 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/0.kmac_csr_rw.2158897974 Oct 02 11:17:57 PM UTC 24 Oct 02 11:18:05 PM UTC 24 119977803 ps
T105 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/1.kmac_shadow_reg_errors.57418107 Oct 02 11:17:57 PM UTC 24 Oct 02 11:18:05 PM UTC 24 241863706 ps
T134 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/0.kmac_csr_mem_rw_with_rand_reset.3872288230 Oct 02 11:17:57 PM UTC 24 Oct 02 11:18:06 PM UTC 24 162891477 ps
T723 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/0.kmac_same_csr_outstanding.3680851198 Oct 02 11:17:57 PM UTC 24 Oct 02 11:18:06 PM UTC 24 54335081 ps
T106 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/0.kmac_shadow_reg_errors.4191712355 Oct 02 11:17:53 PM UTC 24 Oct 02 11:18:06 PM UTC 24 119599040 ps
T125 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/0.kmac_tl_intg_err.418750392 Oct 02 11:17:57 PM UTC 24 Oct 02 11:18:06 PM UTC 24 97354209 ps
T107 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/0.kmac_shadow_reg_errors_with_csr_rw.3964661827 Oct 02 11:17:53 PM UTC 24 Oct 02 11:18:07 PM UTC 24 85692491 ps
T724 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/0.kmac_csr_aliasing.2301110387 Oct 02 11:17:57 PM UTC 24 Oct 02 11:18:08 PM UTC 24 293584980 ps
T725 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/0.kmac_csr_bit_bash.2990080783 Oct 02 11:17:57 PM UTC 24 Oct 02 11:18:11 PM UTC 24 291864674 ps
T726 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/11.kmac_csr_rw.1336357108 Oct 02 11:18:30 PM UTC 24 Oct 02 11:18:32 PM UTC 24 50069479 ps
T130 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/1.kmac_intr_test.3067504002 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:17 PM UTC 24 23189549 ps
T727 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/2.kmac_mem_walk.215355962 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:18 PM UTC 24 15513216 ps
T728 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/1.kmac_csr_rw.788726272 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:18 PM UTC 24 86401879 ps
T729 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/1.kmac_csr_hw_reset.3212272097 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:18 PM UTC 24 92826369 ps
T141 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/2.kmac_mem_partial_access.605057725 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:18 PM UTC 24 88913747 ps
T110 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/2.kmac_shadow_reg_errors.1759658973 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:18 PM UTC 24 265658738 ps
T135 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/1.kmac_csr_mem_rw_with_rand_reset.4093356738 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:18 PM UTC 24 153586909 ps
T730 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/1.kmac_same_csr_outstanding.740174801 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:19 PM UTC 24 39204181 ps
T113 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/2.kmac_shadow_reg_errors_with_csr_rw.3835147771 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:19 PM UTC 24 100557948 ps
T126 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/2.kmac_tl_intg_err.1428224528 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:20 PM UTC 24 157171724 ps
T731 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/5.kmac_csr_rw.2432488047 Oct 02 11:18:17 PM UTC 24 Oct 02 11:18:20 PM UTC 24 87258312 ps
T136 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/2.kmac_tl_errors.963521140 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:21 PM UTC 24 136660437 ps
T127 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/1.kmac_tl_intg_err.1877149500 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:21 PM UTC 24 341236289 ps
T137 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/5.kmac_csr_mem_rw_with_rand_reset.1966168107 Oct 02 11:18:17 PM UTC 24 Oct 02 11:18:21 PM UTC 24 40930566 ps
T160 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/2.kmac_intr_test.663001327 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:21 PM UTC 24 22170975 ps
T150 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/2.kmac_csr_hw_reset.1558859632 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:21 PM UTC 24 291216118 ps
T732 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/1.kmac_csr_aliasing.3580604556 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:21 PM UTC 24 208189945 ps
T733 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/2.kmac_csr_rw.1245864976 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:21 PM UTC 24 34070957 ps
T734 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/3.kmac_mem_walk.3577189579 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:21 PM UTC 24 16519858 ps
T161 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/3.kmac_intr_test.2345875068 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:21 PM UTC 24 120861287 ps
T151 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/5.kmac_same_csr_outstanding.565951058 Oct 02 11:18:17 PM UTC 24 Oct 02 11:18:22 PM UTC 24 103742495 ps
T108 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/3.kmac_shadow_reg_errors.3625935001 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:22 PM UTC 24 361168068 ps
T735 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/4.kmac_mem_walk.2050123271 Oct 02 11:18:17 PM UTC 24 Oct 02 11:18:22 PM UTC 24 13313797 ps
T159 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/3.kmac_csr_hw_reset.3409701341 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:22 PM UTC 24 25119307 ps
T142 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/3.kmac_mem_partial_access.655004120 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:22 PM UTC 24 61727330 ps
T162 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/4.kmac_intr_test.306898043 Oct 02 11:18:17 PM UTC 24 Oct 02 11:18:22 PM UTC 24 17091619 ps
T111 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/3.kmac_shadow_reg_errors_with_csr_rw.1313136618 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:22 PM UTC 24 114681284 ps
T109 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/4.kmac_shadow_reg_errors.288137023 Oct 02 11:18:17 PM UTC 24 Oct 02 11:18:22 PM UTC 24 25189060 ps
T736 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/3.kmac_csr_rw.4006536071 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:22 PM UTC 24 38809409 ps
T737 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/4.kmac_csr_hw_reset.1587590157 Oct 02 11:18:17 PM UTC 24 Oct 02 11:18:22 PM UTC 24 100863499 ps
T138 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/3.kmac_csr_mem_rw_with_rand_reset.2333194840 Oct 02 11:18:17 PM UTC 24 Oct 02 11:18:22 PM UTC 24 147411861 ps
T143 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/4.kmac_mem_partial_access.1083572170 Oct 02 11:18:17 PM UTC 24 Oct 02 11:18:22 PM UTC 24 169742792 ps
T114 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/4.kmac_shadow_reg_errors_with_csr_rw.1312902675 Oct 02 11:18:17 PM UTC 24 Oct 02 11:18:22 PM UTC 24 128867308 ps
T738 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/4.kmac_tl_errors.4114209208 Oct 02 11:18:17 PM UTC 24 Oct 02 11:18:23 PM UTC 24 118320567 ps
T739 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/2.kmac_csr_mem_rw_with_rand_reset.2745853818 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:23 PM UTC 24 142206209 ps
T740 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/2.kmac_same_csr_outstanding.3496094923 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:23 PM UTC 24 486167335 ps
T741 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/3.kmac_same_csr_outstanding.2788593828 Oct 02 11:18:17 PM UTC 24 Oct 02 11:18:23 PM UTC 24 100356130 ps
T742 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/3.kmac_tl_errors.1868355643 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:23 PM UTC 24 49936760 ps
T172 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/4.kmac_tl_intg_err.2900991521 Oct 02 11:18:17 PM UTC 24 Oct 02 11:18:24 PM UTC 24 105499188 ps
T743 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/3.kmac_csr_aliasing.1927019390 Oct 02 11:18:17 PM UTC 24 Oct 02 11:18:25 PM UTC 24 136067684 ps
T744 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/2.kmac_csr_aliasing.2722507403 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:25 PM UTC 24 981921464 ps
T168 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/3.kmac_tl_intg_err.1200158353 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:26 PM UTC 24 1079096066 ps
T745 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/1.kmac_csr_bit_bash.3459414355 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:26 PM UTC 24 1240967701 ps
T746 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/4.kmac_csr_aliasing.2352539921 Oct 02 11:18:17 PM UTC 24 Oct 02 11:18:28 PM UTC 24 75748211 ps
T747 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/3.kmac_csr_bit_bash.1736341963 Oct 02 11:18:16 PM UTC 24 Oct 02 11:18:28 PM UTC 24 287190338 ps
T164 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/6.kmac_intr_test.1145045388 Oct 02 11:18:21 PM UTC 24 Oct 02 11:18:30 PM UTC 24 11689328 ps
T748 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/6.kmac_csr_rw.416560826 Oct 02 11:18:21 PM UTC 24 Oct 02 11:18:30 PM UTC 24 16443307 ps
T163 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/10.kmac_intr_test.2845923973 Oct 02 11:18:25 PM UTC 24 Oct 02 11:18:30 PM UTC 24 38841246 ps
T749 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/10.kmac_csr_rw.4223940283 Oct 02 11:18:25 PM UTC 24 Oct 02 11:18:30 PM UTC 24 181322977 ps
T112 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/11.kmac_shadow_reg_errors.3710806357 Oct 02 11:18:25 PM UTC 24 Oct 02 11:18:31 PM UTC 24 70987337 ps
T750 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/10.kmac_shadow_reg_errors_with_csr_rw.2664137701 Oct 02 11:18:25 PM UTC 24 Oct 02 11:18:31 PM UTC 24 41575429 ps
T751 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/10.kmac_csr_mem_rw_with_rand_reset.981801158 Oct 02 11:18:25 PM UTC 24 Oct 02 11:18:31 PM UTC 24 771318378 ps
T752 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/6.kmac_shadow_reg_errors_with_csr_rw.1969012610 Oct 02 11:18:21 PM UTC 24 Oct 02 11:18:31 PM UTC 24 455935625 ps
T753 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/10.kmac_same_csr_outstanding.3426533286 Oct 02 11:18:25 PM UTC 24 Oct 02 11:18:31 PM UTC 24 380920603 ps
T754 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/6.kmac_csr_mem_rw_with_rand_reset.2495677802 Oct 02 11:18:21 PM UTC 24 Oct 02 11:18:32 PM UTC 24 163810640 ps
T755 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/7.kmac_shadow_reg_errors.67051898 Oct 02 11:18:21 PM UTC 24 Oct 02 11:18:31 PM UTC 24 178131300 ps
T756 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/11.kmac_intr_test.26012409 Oct 02 11:18:30 PM UTC 24 Oct 02 11:18:32 PM UTC 24 37125511 ps
T165 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/7.kmac_intr_test.3694112892 Oct 02 11:18:23 PM UTC 24 Oct 02 11:18:32 PM UTC 24 62457558 ps
T166 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/8.kmac_intr_test.1392874670 Oct 02 11:18:23 PM UTC 24 Oct 02 11:18:32 PM UTC 24 39516312 ps
T757 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/7.kmac_shadow_reg_errors_with_csr_rw.3054793182 Oct 02 11:18:21 PM UTC 24 Oct 02 11:18:32 PM UTC 24 45842296 ps
T758 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/6.kmac_same_csr_outstanding.551881453 Oct 02 11:18:21 PM UTC 24 Oct 02 11:18:32 PM UTC 24 87056916 ps
T759 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/coverage/cover_reg_top/6.kmac_tl_errors.2808104667 Oct 02 11:18:21 PM UTC 24 Oct 02 11:18:32 PM UTC 24 111227138 ps
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