Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_11/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	335	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2652	1			T155	12		T198	1		T156	17
len_5001_7500	6554	1			T29	3		T155	29		T198	1
len_2501_5000	1472	1			T155	9		T156	9		T157	2
len_1025_2500	910	1			T155	3		T156	7		T158	2
len_769_1024	5483	1			T51	4		T11	7		T29	2
len_513_768	6059	1			T14	1		T51	10		T11	10
len_257_512	5856	1			T14	1		T51	7		T11	8
len_0_256	19554	1			T2	3		T3	3		T14	3
len_keccak_block_sizes[72]	54	1			T46	1		T67	1		T65	1
len_keccak_block_sizes[104]	33	1			T46	1		T65	1		T55	1
len_keccak_block_sizes[136]	33	1			T65	1		T55	1		T147	1
len_keccak_block_sizes[144]	24	1			T65	1		T147	1		T148	1
len_keccak_block_sizes[168]	15	1			T148	1		T199	1		T200	1
len_1	83	1			T46	1		T67	1		T65	1
len_0	525	1			T46	1		T31	1		T64	4