Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg
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Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
0.00 1 100 1 64 64


Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 14 14 0 0.00


Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
output_digest_len 14 14 0 0.00 100 1 1 0


Summary for Variable output_digest_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 14 14 0 0.00


User Defined Bins for output_digest_len

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
len_801_1000 0 1 1
len_601_800 0 1 1
len_401_600 0 1 1
len_201_400 0 1 1
len_65_200 0 1 1
len_min_for_xof_require_squeeze 0 1 1
len_keccak_block_sizes[72] 0 1 1
len_keccak_block_sizes[104] 0 1 1
len_keccak_block_sizes[136] 0 1 1
len_keccak_block_sizes[144] 0 1 1
len_keccak_block_sizes[168] 0 1 1
len_datapath_width 0 1 1
len_2_63 0 1 1
len_1 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 0 Excluded

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%