Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
367255 |
1 |
|
|
T4 |
27 |
|
T14 |
393 |
|
T18 |
1970 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
193702 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
127633 |
1 |
|
|
T14 |
389 |
|
T18 |
850 |
|
T31 |
54 |
seven_bytes |
6630 |
1 |
|
|
T4 |
3 |
|
T18 |
40 |
|
T31 |
82 |
six_bytes |
6438 |
1 |
|
|
T18 |
29 |
|
T31 |
57 |
|
T32 |
68 |
five_bytes |
6597 |
1 |
|
|
T4 |
2 |
|
T18 |
29 |
|
T31 |
62 |
four_bytes |
6455 |
1 |
|
|
T18 |
34 |
|
T31 |
60 |
|
T32 |
71 |
three_bytes |
6605 |
1 |
|
|
T18 |
25 |
|
T31 |
60 |
|
T32 |
67 |
two_bytes |
6641 |
1 |
|
|
T4 |
1 |
|
T18 |
22 |
|
T31 |
65 |
one_byte |
6554 |
1 |
|
|
T18 |
32 |
|
T31 |
46 |
|
T32 |
66 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
360308 |
1 |
|
|
T4 |
25 |
|
T14 |
385 |
|
T18 |
1934 |
auto[1] |
6947 |
1 |
|
|
T4 |
2 |
|
T14 |
8 |
|
T18 |
36 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
367255 |
1 |
|
|
T4 |
27 |
|
T14 |
393 |
|
T18 |
1970 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
367231 |
1 |
|
|
T4 |
27 |
|
T14 |
393 |
|
T18 |
1970 |
auto[1] |
24 |
1 |
|
|
T144 |
1 |
|
T145 |
1 |
|
T146 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2382 |
1 |
|
|
T14 |
4 |
|
T18 |
12 |
|
T31 |
4 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6947 |
1 |
|
|
T4 |
2 |
|
T14 |
8 |
|
T18 |
36 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
187812 |
1 |
|
|
T4 |
201 |
|
T14 |
93 |
|
T18 |
609 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
98109 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
66538 |
1 |
|
|
T4 |
4 |
|
T14 |
91 |
|
T18 |
485 |
seven_bytes |
3327 |
1 |
|
|
T4 |
7 |
|
T18 |
6 |
|
T31 |
26 |
six_bytes |
3265 |
1 |
|
|
T4 |
3 |
|
T18 |
2 |
|
T31 |
35 |
five_bytes |
3308 |
1 |
|
|
T4 |
5 |
|
T18 |
3 |
|
T31 |
38 |
four_bytes |
3288 |
1 |
|
|
T4 |
7 |
|
T18 |
6 |
|
T31 |
33 |
three_bytes |
3341 |
1 |
|
|
T4 |
5 |
|
T18 |
1 |
|
T31 |
33 |
two_bytes |
3285 |
1 |
|
|
T4 |
7 |
|
T18 |
6 |
|
T31 |
52 |
one_byte |
3351 |
1 |
|
|
T4 |
1 |
|
T18 |
1 |
|
T31 |
36 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
184248 |
1 |
|
|
T4 |
199 |
|
T14 |
89 |
|
T18 |
597 |
auto[1] |
3564 |
1 |
|
|
T4 |
2 |
|
T14 |
4 |
|
T18 |
12 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
187812 |
1 |
|
|
T4 |
201 |
|
T14 |
93 |
|
T18 |
609 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
187799 |
1 |
|
|
T4 |
201 |
|
T14 |
93 |
|
T18 |
609 |
auto[1] |
13 |
1 |
|
|
T51 |
1 |
|
T147 |
1 |
|
T148 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1238 |
1 |
|
|
T14 |
2 |
|
T18 |
6 |
|
T31 |
4 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3564 |
1 |
|
|
T4 |
2 |
|
T14 |
4 |
|
T18 |
12 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
190024 |
1 |
|
|
T4 |
157 |
|
T14 |
135 |
|
T18 |
900 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
103284 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
62355 |
1 |
|
|
T4 |
3 |
|
T14 |
133 |
|
T18 |
685 |
seven_bytes |
3479 |
1 |
|
|
T4 |
5 |
|
T18 |
7 |
|
T31 |
47 |
six_bytes |
3434 |
1 |
|
|
T4 |
6 |
|
T18 |
10 |
|
T31 |
52 |
five_bytes |
3515 |
1 |
|
|
T4 |
3 |
|
T18 |
5 |
|
T31 |
41 |
four_bytes |
3505 |
1 |
|
|
T4 |
6 |
|
T18 |
3 |
|
T31 |
48 |
three_bytes |
3517 |
1 |
|
|
T4 |
5 |
|
T18 |
7 |
|
T31 |
57 |
two_bytes |
3406 |
1 |
|
|
T4 |
3 |
|
T18 |
3 |
|
T31 |
43 |
one_byte |
3529 |
1 |
|
|
T4 |
3 |
|
T18 |
5 |
|
T31 |
31 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
186512 |
1 |
|
|
T4 |
155 |
|
T14 |
131 |
|
T18 |
876 |
auto[1] |
3512 |
1 |
|
|
T4 |
2 |
|
T14 |
4 |
|
T18 |
24 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
190024 |
1 |
|
|
T4 |
157 |
|
T14 |
135 |
|
T18 |
900 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
190013 |
1 |
|
|
T4 |
157 |
|
T14 |
135 |
|
T18 |
900 |
auto[1] |
11 |
1 |
|
|
T31 |
1 |
|
T117 |
1 |
|
T149 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1189 |
1 |
|
|
T14 |
2 |
|
T18 |
10 |
|
T32 |
6 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3512 |
1 |
|
|
T4 |
2 |
|
T14 |
4 |
|
T18 |
24 |