Unified Coverage Report :: Group :: kmac_env_pkg::app_cg_wrap::app_cg

Group : kmac_env_pkg::app_cg_wrap::app_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
88.89	88.89	1	100	1	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

3 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
AppKeymgr_cg	88.89	1	100	1	64	64
AppLc_cg	88.89	1	100	1	64	64
AppRom_cg	88.89	1	100	1	64	64

---

Group Instance : AppKeymgr_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
88.89	1	100	1	64	64

---

Summary for Group Instance AppKeymgr_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	16	2	14	87.50
Crosses	2	0	2	100.00

Variables for Group Instance AppKeymgr_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
app_err	2	1	1	50.00	100	1	1	2
data_strb	8	0	8	100.00	100	1	1	0
done	2	0	2	100.00	100	1	1	2
in_keccak_rounds	2	1	1	50.00	100	1	1	2
single_data_beat	2	0	2	100.00	100	1	1	2

Crosses for Group Instance AppKeymgr_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
partial_data_on_last_beat	1	0	1	100.00	100	1	1	0
done_in_keccak_rounds	1	0	1	100.00	100	1	1	0

---

Group Instance : AppLc_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
88.89	1	100	1	64	64

---

Summary for Group Instance AppLc_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	16	2	14	87.50
Crosses	2	0	2	100.00

Variables for Group Instance AppLc_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
app_err	2	1	1	50.00	100	1	1	2
data_strb	8	0	8	100.00	100	1	1	0
done	2	0	2	100.00	100	1	1	2
in_keccak_rounds	2	1	1	50.00	100	1	1	2
single_data_beat	2	0	2	100.00	100	1	1	2

Crosses for Group Instance AppLc_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
partial_data_on_last_beat	1	0	1	100.00	100	1	1	0
done_in_keccak_rounds	1	0	1	100.00	100	1	1	0

---

Group Instance : AppRom_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
88.89	1	100	1	64	64

---

Summary for Group Instance AppRom_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	16	2	14	87.50
Crosses	2	0	2	100.00

Variables for Group Instance AppRom_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
app_err	2	1	1	50.00	100	1	1	2
data_strb	8	0	8	100.00	100	1	1	0
done	2	0	2	100.00	100	1	1	2
in_keccak_rounds	2	1	1	50.00	100	1	1	2
single_data_beat	2	0	2	100.00	100	1	1	2

Crosses for Group Instance AppRom_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
partial_data_on_last_beat	1	0	1	100.00	100	1	1	0
done_in_keccak_rounds	1	0	1	100.00	100	1	1	0

Summary for Variable app_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for app_err

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

301820

1

T15

923

T16

2684

T8

82

---

Summary for Variable data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for data_strb

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	156443	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
full_data_beat	108371	1			T15	25		T16	63		T8	81
seven_bytes	5437	1			T15	29		T16	66		T25	50
six_bytes	5336	1			T15	25		T16	56		T25	39
five_bytes	5357	1			T15	21		T16	74		T25	30
four_bytes	5318	1			T15	26		T16	74		T25	50
three_bytes	5221	1			T15	22		T16	75		T25	40
two_bytes	5077	1			T15	20		T16	77		T25	28
one_byte	5260	1			T15	27		T16	77		T25	39

---

Summary for Variable done

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for done

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

296082

1

T15

909

T16

2648

T8

80

auto[1]

5738

1

T15

14

T16

36

T8

2

---

Summary for Variable in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for in_keccak_rounds

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

301820

1

T15

923

T16

2684

T8

82

---

Summary for Variable single_data_beat

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for single_data_beat

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

301795

1

T15

923

T16

2684

T8

82

auto[1]

25

1

T25

1

T35

1

T102

1

---

Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

2000

1

T15

2

T16

7

T8

1

---

Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

5738

1

T15

14

T16

36

T8

2

Summary for Variable app_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for app_err

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

150401

1

T7

4

T15

138

T16

1346

---

Summary for Variable data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for data_strb

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	77714	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
full_data_beat	54325	1			T7	4		T15	2		T16	37
seven_bytes	2634	1			T15	4		T16	39		T25	23
six_bytes	2690	1			T16	47		T25	20		T52	23
five_bytes	2598	1			T15	7		T16	41		T25	19
four_bytes	2716	1			T15	1		T16	34		T25	20
three_bytes	2561	1			T16	35		T25	15		T52	36
two_bytes	2583	1			T15	1		T16	37		T25	16
one_byte	2580	1			T15	4		T16	46		T25	18

---

Summary for Variable done

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for done

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

147465

1

T7

4

T15

136

T16

1330

auto[1]

2936

1

T15

2

T16

16

T8

4

---

Summary for Variable in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for in_keccak_rounds

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

150401

1

T7

4

T15

138

T16

1346

---

Summary for Variable single_data_beat

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for single_data_beat

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

150391

1

T7

4

T15

138

T16

1346

auto[1]

10

1

T140

1

T141

1

T142

1

---

Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

1023

1

T16

3

T8

2

T28

2

---

Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

2936

1

T15

2

T16

16

T8

4

Summary for Variable app_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for app_err

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

154021

1

T5

104

T15

268

T16

1553

---

Summary for Variable data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for data_strb

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	74093	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
full_data_beat	62529	1			T5	103		T15	11		T16	42
seven_bytes	2484	1			T15	9		T16	32		T25	18
six_bytes	2542	1			T15	7		T16	52		T25	14
five_bytes	2499	1			T15	6		T16	37		T25	12
four_bytes	2461	1			T15	8		T16	40		T25	11
three_bytes	2447	1			T15	5		T16	56		T25	17
two_bytes	2533	1			T15	8		T16	38		T25	14
one_byte	2433	1			T15	11		T16	54		T25	8

---

Summary for Variable done

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for done

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

151035

1

T5

102

T15

266

T16

1533

auto[1]

2986

1

T5

2

T15

2

T16

20

---

Summary for Variable in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for in_keccak_rounds

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

154021

1

T5

104

T15

268

T16

1553

---

Summary for Variable single_data_beat

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for single_data_beat

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

154008

1

T5

104

T15

268

T16

1553

auto[1]

13

1

T35

1

T143

1

T144

1

---

Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

1087

1

T5

1

T16

1

T8

1

---

Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

2986

1

T5

2

T15

2

T16

20