Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10352	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9445	1			T15	19		T16	33		T17	17
len_5001_7500	15391	1			T15	54		T16	88		T17	17
len_2501_5000	9371	1			T15	7		T16	15		T17	17
len_1025_2500	5533	1			T15	2		T16	8		T17	10
len_769_1024	6589	1			T6	15		T14	17		T15	8
len_513_768	7068	1			T6	20		T14	24		T15	7
len_257_512	21407	1			T6	17		T14	16		T15	12
len_0_256	260281	1			T4	9		T6	13		T14	15
len_keccak_block_sizes[72]	717	1			T17	2		T19	3		T20	2
len_keccak_block_sizes[104]	613	1			T15	1		T17	2		T19	3
len_keccak_block_sizes[136]	521	1			T17	2		T19	3		T20	2
len_keccak_block_sizes[144]	422	1			T17	2		T19	3		T85	1
len_keccak_block_sizes[168]	322	1			T19	3		T154	3		T155	3
len_1	756	1			T17	2		T19	3		T20	2
len_0	1276	1			T15	2		T16	1		T17	2