Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	728	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	6047	1			T6	5		T14	6		T15	20
len_601_800	13619	1			T6	23		T14	29		T15	45
len_401_600	8998	1			T6	19		T14	23		T15	38
len_201_400	16735	1			T6	12		T14	7		T15	15
len_65_200	74618	1			T6	4		T14	2		T15	23
len_min_for_xof_require_squeeze	1005	1			T18	1		T19	10		T154	10
len_keccak_block_sizes[72]	773	1			T15	1		T19	5		T154	5
len_keccak_block_sizes[104]	749	1			T19	5		T27	1		T154	5
len_keccak_block_sizes[136]	762	1			T19	5		T154	5		T155	9
len_keccak_block_sizes[144]	279	1			T19	5		T154	5		T156	5
len_keccak_block_sizes[168]	285	1			T19	5		T154	5		T156	5
len_datapath_width	14454	1			T4	3		T6	1		T15	5
len_2_63	216018	1			T4	6		T6	26		T14	35
len_1	73	1			T37	1		T57	1		T38	1