Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	255766876	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

202937515

1

T1

262009

T2

184239

T3

129856

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	242041086	1			T1	338099		T2	235479		T3	137663
values[0x0]	104089685	1			T1	155143		T2	106584		T3	32762
values[0x1]	112573620	1			T1	166387		T2	114779		T3	34888

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	199316134	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

259388257

1

T1

348932

T2

243465

T3

146820

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1467797	1			T1	2641		T2	1701		T3	795
valid_sources[0x01]	1397865	1			T1	2719		T2	1782		T3	810
valid_sources[0x02]	1408793	1			T1	2544		T2	1854		T3	751
valid_sources[0x03]	3819099	1			T1	2582		T2	1669		T3	846
valid_sources[0x04]	1874460	1			T1	2493		T2	1865		T3	774
valid_sources[0x05]	4325304	1			T1	2498		T2	1722		T3	793
valid_sources[0x06]	2267558	1			T1	2540		T2	2000		T3	776
valid_sources[0x07]	1451438	1			T1	2687		T2	1876		T3	747
valid_sources[0x08]	1411869	1			T1	2455		T2	2148		T3	782
valid_sources[0x09]	1408178	1			T1	2626		T2	1818		T3	835
valid_sources[0x0a]	1443414	1			T1	2582		T2	1776		T3	754
valid_sources[0x0b]	1577639	1			T1	2532		T2	1810		T3	808
valid_sources[0x0c]	2270869	1			T1	2578		T2	1884		T3	770
valid_sources[0x0d]	1551297	1			T1	2574		T2	1561		T3	822
valid_sources[0x0e]	1413622	1			T1	2600		T2	1570		T3	761
valid_sources[0x0f]	1404544	1			T1	2651		T2	1849		T3	811
valid_sources[0x10]	1400539	1			T1	2576		T2	1554		T3	865
valid_sources[0x11]	1403897	1			T1	2550		T2	1864		T3	908
valid_sources[0x12]	1882576	1			T1	2656		T2	1540		T3	809
valid_sources[0x13]	1407130	1			T1	2654		T2	1663		T3	802
valid_sources[0x14]	1484209	1			T1	2560		T2	1705		T3	743
valid_sources[0x15]	1402182	1			T1	2563		T2	1776		T3	790
valid_sources[0x16]	1405435	1			T1	2577		T2	1863		T3	889
valid_sources[0x17]	1422278	1			T1	2578		T2	1503		T3	803
valid_sources[0x18]	1410574	1			T1	2569		T2	1676		T3	801
valid_sources[0x19]	1412573	1			T1	2596		T2	1876		T3	799
valid_sources[0x1a]	1409966	1			T1	2549		T2	1892		T3	767
valid_sources[0x1b]	1873516	1			T1	2529		T2	1744		T3	724
valid_sources[0x1c]	1469827	1			T1	2628		T2	1724		T3	795
valid_sources[0x1d]	1420274	1			T1	2621		T2	1942		T3	753
valid_sources[0x1e]	1403569	1			T1	2598		T2	1930		T3	754
valid_sources[0x1f]	4696626	1			T1	2642		T2	1592		T3	786
valid_sources[0x20]	1395952	1			T1	2585		T2	1778		T3	921
valid_sources[0x21]	1398814	1			T1	2597		T2	1728		T3	815
valid_sources[0x22]	1405143	1			T1	2584		T2	1806		T3	841
valid_sources[0x23]	3848671	1			T1	2535		T2	1700		T3	825
valid_sources[0x24]	1412736	1			T1	2590		T2	1789		T3	844
valid_sources[0x25]	1495121	1			T1	2537		T2	1679		T3	893
valid_sources[0x26]	2075823	1			T1	2601		T2	1752		T3	799
valid_sources[0x27]	1407627	1			T1	2609		T2	1745		T3	771
valid_sources[0x28]	1403135	1			T1	2509		T2	1719		T3	684
valid_sources[0x29]	1454306	1			T1	2539		T2	1777		T3	813
valid_sources[0x2a]	1403152	1			T1	2687		T2	1722		T3	916
valid_sources[0x2b]	1588455	1			T1	2627		T2	2082		T3	739
valid_sources[0x2c]	2084808	1			T1	2586		T2	2000		T3	794
valid_sources[0x2d]	2245334	1			T1	2584		T2	1811		T3	765
valid_sources[0x2e]	3337532	1			T1	2634		T2	1763		T3	767
valid_sources[0x2f]	1858184	1			T1	2574		T2	1606		T3	718
valid_sources[0x30]	1406141	1			T1	2619		T2	2023		T3	890
valid_sources[0x31]	1409237	1			T1	2573		T2	1864		T3	852
valid_sources[0x32]	1414104	1			T1	2580		T2	1746		T3	774
valid_sources[0x33]	1404281	1			T1	2537		T2	2129		T3	868
valid_sources[0x34]	2492497	1			T1	2617		T2	1929		T3	743
valid_sources[0x35]	1408119	1			T1	2497		T2	1651		T3	885
valid_sources[0x36]	1405763	1			T1	2564		T2	1566		T3	778
valid_sources[0x37]	1411949	1			T1	2603		T2	1607		T3	837
valid_sources[0x38]	1408105	1			T1	2596		T2	1627		T3	750
valid_sources[0x39]	1701812	1			T1	2605		T2	1739		T3	780
valid_sources[0x3a]	1401049	1			T1	2578		T2	1926		T3	744
valid_sources[0x3b]	1416695	1			T1	2491		T2	1691		T3	880
valid_sources[0x3c]	1401447	1			T1	2610		T2	2198		T3	811
valid_sources[0x3d]	2317198	1			T1	2536		T2	1853		T3	806
valid_sources[0x3e]	3431168	1			T1	2561		T2	1730		T3	824
valid_sources[0x3f]	1410629	1			T1	2624		T2	1903		T3	820
valid_sources[0x40]	1425372	1			T1	2611		T2	1966		T3	775
valid_sources[0x41]	1401626	1			T1	2508		T2	1750		T3	774
valid_sources[0x42]	3811490	1			T1	2625		T2	1901		T3	794
valid_sources[0x43]	1405314	1			T1	2566		T2	1824		T3	904
valid_sources[0x44]	1549344	1			T1	2568		T2	1874		T3	779
valid_sources[0x45]	1723992	1			T1	2525		T2	1907		T3	842
valid_sources[0x46]	1516362	1			T1	2599		T2	1761		T3	715
valid_sources[0x47]	1564593	1			T1	2552		T2	1844		T3	765
valid_sources[0x48]	2084416	1			T1	2638		T2	1727		T3	760
valid_sources[0x49]	1408897	1			T1	2551		T2	1850		T3	877
valid_sources[0x4a]	2355368	1			T1	2526		T2	1817		T3	866
valid_sources[0x4b]	1418831	1			T1	2627		T2	1800		T3	831
valid_sources[0x4c]	1409747	1			T1	2585		T2	1711		T3	821
valid_sources[0x4d]	1456992	1			T1	2568		T2	1641		T3	671
valid_sources[0x4e]	1407244	1			T1	2665		T2	1720		T3	833
valid_sources[0x4f]	1401061	1			T1	2560		T2	1554		T3	729
valid_sources[0x50]	1393443	1			T1	2594		T2	1551		T3	823
valid_sources[0x51]	1402759	1			T1	2539		T2	1872		T3	815
valid_sources[0x52]	1421041	1			T1	2536		T2	1643		T3	816
valid_sources[0x53]	1397466	1			T1	2560		T2	1915		T3	765
valid_sources[0x54]	1437195	1			T1	2514		T2	1949		T3	755
valid_sources[0x55]	1437479	1			T1	2607		T2	1723		T3	788
valid_sources[0x56]	4299398	1			T1	2481		T2	1468		T3	798
valid_sources[0x57]	1873642	1			T1	2593		T2	1801		T3	773
valid_sources[0x58]	3447434	1			T1	2611		T2	1829		T3	793
valid_sources[0x59]	1548321	1			T1	2641		T2	1809		T3	727
valid_sources[0x5a]	2082350	1			T1	2547		T2	1681		T3	758
valid_sources[0x5b]	1427892	1			T1	2549		T2	1746		T3	899
valid_sources[0x5c]	1407736	1			T1	2563		T2	1594		T3	818
valid_sources[0x5d]	4816083	1			T1	2602		T2	1800		T3	748
valid_sources[0x5e]	1404718	1			T1	2627		T2	1763		T3	842
valid_sources[0x5f]	1410824	1			T1	2549		T2	1744		T3	871
valid_sources[0x60]	1405101	1			T1	2638		T2	1849		T3	804
valid_sources[0x61]	1403536	1			T1	2546		T2	1743		T3	820
valid_sources[0x62]	2975101	1			T1	2596		T2	1782		T3	850
valid_sources[0x63]	1889060	1			T1	2413		T2	1790		T3	830
valid_sources[0x64]	1408212	1			T1	2623		T2	2096		T3	844
valid_sources[0x65]	1395274	1			T1	2568		T2	1991		T3	735
valid_sources[0x66]	1534151	1			T1	2624		T2	1916		T3	790
valid_sources[0x67]	1410578	1			T1	2560		T2	1790		T3	798
valid_sources[0x68]	1515940	1			T1	2584		T2	2112		T3	828
valid_sources[0x69]	1414547	1			T1	2583		T2	1892		T3	779
valid_sources[0x6a]	1403093	1			T1	2580		T2	1815		T3	898
valid_sources[0x6b]	1531930	1			T1	2590		T2	1805		T3	864
valid_sources[0x6c]	1415589	1			T1	2584		T2	1723		T3	782
valid_sources[0x6d]	1412884	1			T1	2621		T2	1879		T3	781
valid_sources[0x6e]	2143670	1			T1	2595		T2	1491		T3	847
valid_sources[0x6f]	2057826	1			T1	2598		T2	1543		T3	770
valid_sources[0x70]	1404540	1			T1	2611		T2	1806		T3	702
valid_sources[0x71]	1416233	1			T1	2658		T2	1854		T3	804
valid_sources[0x72]	1406157	1			T1	2538		T2	1640		T3	897
valid_sources[0x73]	1402128	1			T1	2489		T2	1667		T3	815
valid_sources[0x74]	1402994	1			T1	2611		T2	1845		T3	860
valid_sources[0x75]	1884329	1			T1	2593		T2	1702		T3	811
valid_sources[0x76]	1456643	1			T1	2589		T2	1633		T3	753
valid_sources[0x77]	1710214	1			T1	2570		T2	1726		T3	747
valid_sources[0x78]	1410451	1			T1	2517		T2	1659		T3	794
valid_sources[0x79]	2074251	1			T1	2657		T2	1788		T3	797
valid_sources[0x7a]	1502387	1			T1	2529		T2	1988		T3	801
valid_sources[0x7b]	1840272	1			T1	2637		T2	1858		T3	919
valid_sources[0x7c]	1403262	1			T1	2549		T2	1690		T3	816
valid_sources[0x7d]	1409367	1			T1	2519		T2	1718		T3	873
valid_sources[0x7e]	1407459	1			T1	2544		T2	2155		T3	839
valid_sources[0x7f]	1406278	1			T1	2581		T2	1847		T3	774
valid_sources[0x80]	1406019	1			T1	2575		T2	1855		T3	730

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

88595089

1

T1

99426

T2

71500

T3

91933

values[0x0]

all_enables

biggest_size

61482958

1

T1

88395

T2

61193

T3

20215

values[0x1]

all_enables

biggest_size

52859468

1

T1

74188

T2

51546

T3

17708