Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	252304278	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

199219691

1

T1

98260

T2

1080

T3

6

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	237845982	1			T1	104640		T2	81		T3	1
values[0x0]	102635541	1			T1	22726		T2	521		T3	12
values[0x1]	111042446	1			T1	24522		T2	556		T3	9

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	196604591	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

254919378

1

T1

110377

T2

1097

T3

10

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2196273	1			T1	566		T2	6		T4	690
valid_sources[0x01]	2202280	1			T1	578		T2	4		T4	684
valid_sources[0x02]	1334554	1			T1	586		T2	4		T4	688
valid_sources[0x03]	1399219	1			T1	579		T2	5		T4	709
valid_sources[0x04]	1818021	1			T1	630		T2	2		T4	741
valid_sources[0x05]	3410174	1			T1	618		T2	1		T4	687
valid_sources[0x06]	1835797	1			T1	546		T2	4		T4	631
valid_sources[0x07]	1333615	1			T1	553		T2	4		T4	724
valid_sources[0x08]	1334194	1			T1	641		T2	7		T4	632
valid_sources[0x09]	1336396	1			T1	568		T2	2		T4	653
valid_sources[0x0a]	1327455	1			T1	584		T2	2		T4	613
valid_sources[0x0b]	1336352	1			T1	559		T2	3		T4	696
valid_sources[0x0c]	1413873	1			T1	601		T2	6		T4	672
valid_sources[0x0d]	1335637	1			T1	632		T2	5		T4	767
valid_sources[0x0e]	1336411	1			T1	587		T2	4		T4	636
valid_sources[0x0f]	2238993	1			T1	567		T2	5		T4	660
valid_sources[0x10]	3396224	1			T1	561		T2	3		T4	657
valid_sources[0x11]	1344273	1			T1	568		T2	2		T4	616
valid_sources[0x12]	1333974	1			T1	571		T2	5		T4	592
valid_sources[0x13]	1344094	1			T1	611		T2	3		T4	689
valid_sources[0x14]	1345109	1			T1	607		T2	9		T4	620
valid_sources[0x15]	1334169	1			T1	588		T2	4		T4	720
valid_sources[0x16]	1338072	1			T1	590		T2	2		T4	606
valid_sources[0x17]	1344556	1			T1	590		T2	4		T4	654
valid_sources[0x18]	2895053	1			T1	611		T2	7		T4	626
valid_sources[0x19]	1334629	1			T1	597		T2	4		T4	662
valid_sources[0x1a]	1360267	1			T1	627		T2	5		T4	771
valid_sources[0x1b]	1584386	1			T1	618		T2	2		T4	678
valid_sources[0x1c]	1340228	1			T1	610		T2	6		T3	16
valid_sources[0x1d]	1336687	1			T1	625		T2	2		T4	666
valid_sources[0x1e]	1337126	1			T1	585		T2	4		T4	628
valid_sources[0x1f]	3765715	1			T1	625		T2	5		T4	581
valid_sources[0x20]	2175454	1			T1	569		T2	3		T4	719
valid_sources[0x21]	1335027	1			T1	554		T2	7		T4	633
valid_sources[0x22]	1334918	1			T1	645		T2	3		T4	659
valid_sources[0x23]	2114003	1			T1	567		T2	4		T4	663
valid_sources[0x24]	2259534	1			T1	564		T2	2		T4	635
valid_sources[0x25]	1345820	1			T1	585		T2	5		T4	666
valid_sources[0x26]	1359309	1			T1	572		T2	5		T4	678
valid_sources[0x27]	1332673	1			T1	571		T2	2		T4	638
valid_sources[0x28]	1343393	1			T1	550		T2	7		T4	647
valid_sources[0x29]	3145618	1			T1	631		T2	7		T4	588
valid_sources[0x2a]	1338722	1			T1	575		T2	3		T4	660
valid_sources[0x2b]	1798613	1			T1	633		T2	8		T4	582
valid_sources[0x2c]	1333459	1			T1	582		T4	690		T5	381
valid_sources[0x2d]	1338758	1			T1	601		T2	1		T4	651
valid_sources[0x2e]	1335976	1			T1	539		T2	3		T4	713
valid_sources[0x2f]	1364377	1			T1	514		T2	5		T4	623
valid_sources[0x30]	4784935	1			T1	607		T2	5		T4	619
valid_sources[0x31]	1365640	1			T1	572		T2	3		T4	701
valid_sources[0x32]	2209103	1			T1	584		T2	5		T4	651
valid_sources[0x33]	3383660	1			T1	669		T2	5		T4	678
valid_sources[0x34]	1336876	1			T1	683		T2	6		T4	659
valid_sources[0x35]	2762297	1			T1	604		T2	5		T4	620
valid_sources[0x36]	1334922	1			T1	632		T2	2		T4	648
valid_sources[0x37]	1337717	1			T1	567		T2	4		T4	685
valid_sources[0x38]	1368854	1			T1	579		T2	7		T4	648
valid_sources[0x39]	1342004	1			T1	624		T2	6		T4	704
valid_sources[0x3a]	1336838	1			T1	591		T2	5		T4	656
valid_sources[0x3b]	1407003	1			T1	585		T2	7		T4	632
valid_sources[0x3c]	1439546	1			T1	603		T2	2		T4	666
valid_sources[0x3d]	2167263	1			T1	601		T2	6		T4	658
valid_sources[0x3e]	3443529	1			T1	586		T2	3		T4	559
valid_sources[0x3f]	2196805	1			T1	630		T2	3		T4	643
valid_sources[0x40]	1336540	1			T1	583		T2	4		T4	701
valid_sources[0x41]	1334314	1			T1	577		T2	5		T4	721
valid_sources[0x42]	1332671	1			T1	582		T2	5		T4	681
valid_sources[0x43]	3393658	1			T1	593		T2	5		T4	644
valid_sources[0x44]	1330590	1			T1	558		T2	7		T4	715
valid_sources[0x45]	1340776	1			T1	629		T2	2		T4	709
valid_sources[0x46]	1337153	1			T1	628		T2	4		T4	606
valid_sources[0x47]	1361025	1			T1	650		T2	4		T4	552
valid_sources[0x48]	1435921	1			T1	574		T2	6		T4	581
valid_sources[0x49]	1337541	1			T1	575		T2	5		T4	644
valid_sources[0x4a]	1352385	1			T1	576		T2	6		T4	655
valid_sources[0x4b]	1339327	1			T1	539		T2	5		T4	678
valid_sources[0x4c]	1338440	1			T1	585		T2	7		T4	625
valid_sources[0x4d]	1340572	1			T1	582		T2	10		T4	669
valid_sources[0x4e]	1337663	1			T1	590		T2	5		T4	679
valid_sources[0x4f]	2622378	1			T1	608		T2	5		T4	683
valid_sources[0x50]	1334804	1			T1	559		T2	5		T4	562
valid_sources[0x51]	1333060	1			T1	644		T2	2		T4	688
valid_sources[0x52]	1338742	1			T1	611		T2	5		T4	705
valid_sources[0x53]	1332386	1			T1	642		T2	6		T4	687
valid_sources[0x54]	1336302	1			T1	569		T2	5		T4	707
valid_sources[0x55]	2279043	1			T1	606		T2	1		T4	646
valid_sources[0x56]	1338360	1			T1	564		T2	3		T4	718
valid_sources[0x57]	1328228	1			T1	622		T2	5		T4	633
valid_sources[0x58]	1999949	1			T1	636		T2	6		T4	737
valid_sources[0x59]	2247514	1			T1	533		T2	4		T4	670
valid_sources[0x5a]	1628450	1			T1	598		T2	7		T4	639
valid_sources[0x5b]	1427647	1			T1	588		T2	6		T4	729
valid_sources[0x5c]	2216852	1			T1	619		T2	5		T4	709
valid_sources[0x5d]	1406241	1			T1	635		T2	6		T4	718
valid_sources[0x5e]	1383742	1			T1	587		T2	6		T4	729
valid_sources[0x5f]	2450563	1			T1	611		T2	2		T4	616
valid_sources[0x60]	1413011	1			T1	602		T2	4		T4	669
valid_sources[0x61]	1405629	1			T1	579		T2	4		T4	607
valid_sources[0x62]	1805842	1			T1	600		T2	6		T4	660
valid_sources[0x63]	1336865	1			T1	597		T2	2		T4	664
valid_sources[0x64]	1372441	1			T1	594		T2	3		T4	661
valid_sources[0x65]	1342539	1			T1	587		T2	5		T4	654
valid_sources[0x66]	2659086	1			T1	597		T2	1		T4	782
valid_sources[0x67]	3358668	1			T1	602		T2	2		T4	600
valid_sources[0x68]	1377704	1			T1	614		T4	589		T5	370
valid_sources[0x69]	1340244	1			T1	636		T2	6		T4	755
valid_sources[0x6a]	3727515	1			T1	583		T2	5		T4	625
valid_sources[0x6b]	1795505	1			T1	576		T2	6		T4	701
valid_sources[0x6c]	3776413	1			T1	578		T2	4		T4	705
valid_sources[0x6d]	1327952	1			T1	607		T2	9		T4	701
valid_sources[0x6e]	1330464	1			T1	592		T2	3		T4	660
valid_sources[0x6f]	3397646	1			T1	591		T2	3		T4	642
valid_sources[0x70]	1342244	1			T1	672		T2	6		T4	624
valid_sources[0x71]	2311840	1			T1	601		T2	6		T4	685
valid_sources[0x72]	1335823	1			T1	598		T2	6		T4	657
valid_sources[0x73]	1386788	1			T1	610		T2	8		T4	680
valid_sources[0x74]	2195013	1			T1	586		T2	1		T4	664
valid_sources[0x75]	1367449	1			T1	593		T2	3		T4	680
valid_sources[0x76]	1336441	1			T1	585		T2	2		T4	651
valid_sources[0x77]	1368975	1			T1	591		T2	5		T4	635
valid_sources[0x78]	1337175	1			T1	596		T2	4		T4	591
valid_sources[0x79]	1329433	1			T1	556		T2	5		T4	592
valid_sources[0x7a]	1338683	1			T1	600		T2	4		T4	674
valid_sources[0x7b]	1439859	1			T1	649		T2	5		T4	757
valid_sources[0x7c]	2459968	1			T1	574		T2	1		T4	675
valid_sources[0x7d]	1340082	1			T1	568		T2	1		T4	659
valid_sources[0x7e]	1340897	1			T1	630		T2	5		T4	672
valid_sources[0x7f]	1521160	1			T1	622		T2	6		T4	618
valid_sources[0x80]	1327594	1			T1	646		T2	8		T4	616

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

86601257

1

T1

72621

T2

45

T3

1

values[0x0]

all_enables

biggest_size

60558782

1

T1

13745

T2

498

T3

4

values[0x1]

all_enables

biggest_size

52059652

1

T1

11894

T2

537

T3

1