Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
341829 |
1 |
|
|
T3 |
2466 |
|
T14 |
4126 |
|
T17 |
2586 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
178527 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
121087 |
1 |
|
|
T3 |
58 |
|
T14 |
789 |
|
T17 |
61 |
seven_bytes |
6048 |
1 |
|
|
T3 |
50 |
|
T14 |
103 |
|
T17 |
67 |
six_bytes |
5956 |
1 |
|
|
T3 |
70 |
|
T14 |
100 |
|
T17 |
58 |
five_bytes |
6010 |
1 |
|
|
T3 |
55 |
|
T14 |
87 |
|
T17 |
75 |
four_bytes |
6111 |
1 |
|
|
T3 |
76 |
|
T14 |
84 |
|
T17 |
64 |
three_bytes |
6157 |
1 |
|
|
T3 |
59 |
|
T14 |
91 |
|
T17 |
67 |
two_bytes |
5946 |
1 |
|
|
T3 |
68 |
|
T14 |
88 |
|
T17 |
89 |
one_byte |
5987 |
1 |
|
|
T3 |
69 |
|
T14 |
98 |
|
T17 |
67 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
335206 |
1 |
|
|
T3 |
2440 |
|
T14 |
4062 |
|
T17 |
2558 |
auto[1] |
6623 |
1 |
|
|
T3 |
26 |
|
T14 |
64 |
|
T17 |
28 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
341829 |
1 |
|
|
T3 |
2466 |
|
T14 |
4126 |
|
T17 |
2586 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
341802 |
1 |
|
|
T3 |
2466 |
|
T14 |
4126 |
|
T17 |
2586 |
auto[1] |
27 |
1 |
|
|
T37 |
1 |
|
T160 |
1 |
|
T161 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2315 |
1 |
|
|
T3 |
10 |
|
T14 |
19 |
|
T17 |
4 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6623 |
1 |
|
|
T3 |
26 |
|
T14 |
64 |
|
T17 |
28 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174806 |
1 |
|
|
T3 |
1879 |
|
T14 |
1062 |
|
T17 |
2274 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
89505 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
64185 |
1 |
|
|
T3 |
46 |
|
T14 |
333 |
|
T17 |
61 |
seven_bytes |
3002 |
1 |
|
|
T3 |
53 |
|
T14 |
22 |
|
T17 |
57 |
six_bytes |
3009 |
1 |
|
|
T3 |
47 |
|
T14 |
18 |
|
T17 |
46 |
five_bytes |
2972 |
1 |
|
|
T3 |
38 |
|
T14 |
18 |
|
T17 |
50 |
four_bytes |
2998 |
1 |
|
|
T3 |
56 |
|
T14 |
16 |
|
T17 |
60 |
three_bytes |
3032 |
1 |
|
|
T3 |
48 |
|
T14 |
18 |
|
T17 |
67 |
two_bytes |
3102 |
1 |
|
|
T3 |
62 |
|
T14 |
25 |
|
T17 |
69 |
one_byte |
3001 |
1 |
|
|
T3 |
51 |
|
T14 |
19 |
|
T17 |
51 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
171412 |
1 |
|
|
T3 |
1863 |
|
T14 |
1040 |
|
T17 |
2250 |
auto[1] |
3394 |
1 |
|
|
T3 |
16 |
|
T14 |
22 |
|
T17 |
24 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174806 |
1 |
|
|
T3 |
1879 |
|
T14 |
1062 |
|
T17 |
2274 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174797 |
1 |
|
|
T3 |
1879 |
|
T14 |
1062 |
|
T17 |
2274 |
auto[1] |
9 |
1 |
|
|
T162 |
1 |
|
T163 |
1 |
|
T164 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1192 |
1 |
|
|
T3 |
1 |
|
T14 |
7 |
|
T17 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3394 |
1 |
|
|
T3 |
16 |
|
T14 |
22 |
|
T17 |
24 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
186310 |
1 |
|
|
T3 |
1907 |
|
T14 |
1767 |
|
T17 |
1875 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
98135 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
64556 |
1 |
|
|
T3 |
48 |
|
T14 |
429 |
|
T17 |
50 |
seven_bytes |
3443 |
1 |
|
|
T3 |
58 |
|
T14 |
44 |
|
T17 |
56 |
six_bytes |
3383 |
1 |
|
|
T3 |
52 |
|
T14 |
48 |
|
T17 |
53 |
five_bytes |
3363 |
1 |
|
|
T3 |
39 |
|
T14 |
44 |
|
T17 |
49 |
four_bytes |
3407 |
1 |
|
|
T3 |
50 |
|
T14 |
31 |
|
T17 |
49 |
three_bytes |
3309 |
1 |
|
|
T3 |
59 |
|
T14 |
41 |
|
T17 |
46 |
two_bytes |
3365 |
1 |
|
|
T3 |
40 |
|
T14 |
45 |
|
T17 |
55 |
one_byte |
3349 |
1 |
|
|
T3 |
44 |
|
T14 |
30 |
|
T17 |
49 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
182770 |
1 |
|
|
T3 |
1885 |
|
T14 |
1747 |
|
T17 |
1855 |
auto[1] |
3540 |
1 |
|
|
T3 |
22 |
|
T14 |
20 |
|
T17 |
20 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
186310 |
1 |
|
|
T3 |
1907 |
|
T14 |
1767 |
|
T17 |
1875 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
186298 |
1 |
|
|
T3 |
1907 |
|
T14 |
1767 |
|
T17 |
1875 |
auto[1] |
12 |
1 |
|
|
T116 |
1 |
|
T165 |
1 |
|
T166 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1202 |
1 |
|
|
T3 |
3 |
|
T14 |
8 |
|
T17 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3540 |
1 |
|
|
T3 |
22 |
|
T14 |
20 |
|
T17 |
20 |