Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	256155940	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

202978604

1

T1

319715

T2

175879

T3

9548

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	241473150	1			T1	399496		T2	51597		T3	8297
values[0x0]	104603901	1			T1	170928		T2	68076		T3	793
values[0x1]	113057493	1			T1	183539		T2	68455		T3	785

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	199661584	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

259472960

1

T1

414237

T2

179089

T3

9643

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1905174	1			T1	3171		T2	724		T3	40
valid_sources[0x01]	1459413	1			T1	2820		T2	746		T3	65
valid_sources[0x02]	1886273	1			T1	2777		T2	740		T3	28
valid_sources[0x03]	1770251	1			T1	2668		T2	748		T3	87
valid_sources[0x04]	1460520	1			T1	2801		T2	828		T3	23
valid_sources[0x05]	2327248	1			T1	3177		T2	729		T3	47
valid_sources[0x06]	1449750	1			T1	2686		T2	736		T3	46
valid_sources[0x07]	4135198	1			T1	2869		T2	749		T3	34
valid_sources[0x08]	1447762	1			T1	2929		T2	759		T3	20
valid_sources[0x09]	1460240	1			T1	3268		T2	738		T3	62
valid_sources[0x0a]	1450169	1			T1	3022		T2	761		T3	19
valid_sources[0x0b]	1506034	1			T1	3200		T2	790		T3	19
valid_sources[0x0c]	1441170	1			T1	2797		T2	679		T3	48
valid_sources[0x0d]	1441228	1			T1	2991		T2	711		T3	41
valid_sources[0x0e]	1449120	1			T1	2732		T2	829		T3	57
valid_sources[0x0f]	1444989	1			T1	3116		T2	695		T3	73
valid_sources[0x10]	2092143	1			T1	2739		T2	696		T3	40
valid_sources[0x11]	2111559	1			T1	2879		T2	767		T3	22
valid_sources[0x12]	1444016	1			T1	2936		T2	760		T3	17
valid_sources[0x13]	1445468	1			T1	2701		T2	762		T3	42
valid_sources[0x14]	1444303	1			T1	2647		T2	815		T3	38
valid_sources[0x15]	1558427	1			T1	3036		T2	653		T3	60
valid_sources[0x16]	1442917	1			T1	2981		T2	710		T3	7
valid_sources[0x17]	1529440	1			T1	3019		T2	745		T3	32
valid_sources[0x18]	2529999	1			T1	3075		T2	651		T3	56
valid_sources[0x19]	1455585	1			T1	2926		T2	717		T3	55
valid_sources[0x1a]	2572811	1			T1	3075		T2	796		T3	39
valid_sources[0x1b]	1448067	1			T1	2951		T2	695		T3	100
valid_sources[0x1c]	2358460	1			T1	3157		T2	772		T3	35
valid_sources[0x1d]	1452521	1			T1	2917		T2	712		T3	49
valid_sources[0x1e]	1468349	1			T1	2923		T2	715		T3	15
valid_sources[0x1f]	1435913	1			T1	3011		T2	808		T3	47
valid_sources[0x20]	1470376	1			T1	2848		T2	690		T3	19
valid_sources[0x21]	1435436	1			T1	3231		T2	820		T3	27
valid_sources[0x22]	2820198	1			T1	2874		T2	728		T3	8
valid_sources[0x23]	1504562	1			T1	2778		T2	734		T3	23
valid_sources[0x24]	3837093	1			T1	3183		T2	717		T3	70
valid_sources[0x25]	1447286	1			T1	3153		T2	707		T3	38
valid_sources[0x26]	1440989	1			T1	2631		T2	838		T3	25
valid_sources[0x27]	1442242	1			T1	3369		T2	746		T3	21
valid_sources[0x28]	1458321	1			T1	2888		T2	700		T3	51
valid_sources[0x29]	1447086	1			T1	3323		T2	750		T3	64
valid_sources[0x2a]	1444275	1			T1	2902		T2	739		T3	46
valid_sources[0x2b]	1443812	1			T1	2703		T2	785		T3	7
valid_sources[0x2c]	1708933	1			T1	3030		T2	707		T3	21
valid_sources[0x2d]	1435638	1			T1	2844		T2	766		T3	56
valid_sources[0x2e]	1441327	1			T1	3054		T2	753		T3	23
valid_sources[0x2f]	1443577	1			T1	3230		T2	774		T3	22
valid_sources[0x30]	1740644	1			T1	2677		T2	714		T3	23
valid_sources[0x31]	2195373	1			T1	2634		T2	731		T3	8
valid_sources[0x32]	1454411	1			T1	2885		T2	760		T3	28
valid_sources[0x33]	1445202	1			T1	3036		T2	730		T3	19
valid_sources[0x34]	1448624	1			T1	2924		T2	670		T3	26
valid_sources[0x35]	1440128	1			T1	2901		T2	775		T3	38
valid_sources[0x36]	1444004	1			T1	2839		T2	724		T3	40
valid_sources[0x37]	1438888	1			T1	2770		T2	776		T3	5
valid_sources[0x38]	1444438	1			T1	2699		T2	752		T3	21
valid_sources[0x39]	1451764	1			T1	2980		T2	690		T3	18
valid_sources[0x3a]	1440944	1			T1	2838		T2	714		T3	13
valid_sources[0x3b]	2627845	1			T1	3109		T2	690		T3	27
valid_sources[0x3c]	1919472	1			T1	2933		T2	765		T3	25
valid_sources[0x3d]	1451689	1			T1	2582		T2	713		T3	58
valid_sources[0x3e]	1444672	1			T1	2549		T2	704		T3	23
valid_sources[0x3f]	1444935	1			T1	2604		T2	734		T3	13
valid_sources[0x40]	3143110	1			T1	2602		T2	735		T3	16
valid_sources[0x41]	1906755	1			T1	3102		T2	718		T3	45
valid_sources[0x42]	1447314	1			T1	2839		T2	731		T3	38
valid_sources[0x43]	1471282	1			T1	2979		T2	821		T3	36
valid_sources[0x44]	2963471	1			T1	2918		T2	709		T3	44
valid_sources[0x45]	1442049	1			T1	3365		T2	700		T3	12
valid_sources[0x46]	1445273	1			T1	2878		T2	762		T3	38
valid_sources[0x47]	1695733	1			T1	2883		T2	774		T3	6
valid_sources[0x48]	1442022	1			T1	2785		T2	874		T3	24
valid_sources[0x49]	2100742	1			T1	3283		T2	737		T3	5
valid_sources[0x4a]	3865838	1			T1	2803		T2	727		T3	50
valid_sources[0x4b]	1444461	1			T1	2805		T2	798		T3	15
valid_sources[0x4c]	2786661	1			T1	2805		T2	745		T3	29
valid_sources[0x4d]	1438254	1			T1	3270		T2	783		T3	24
valid_sources[0x4e]	1441618	1			T1	2864		T2	783		T3	65
valid_sources[0x4f]	1445762	1			T1	2898		T2	789		T3	40
valid_sources[0x50]	1437096	1			T1	2960		T2	707		T3	40
valid_sources[0x51]	1442136	1			T1	2852		T2	685		T3	39
valid_sources[0x52]	1439336	1			T1	2911		T2	783		T3	23
valid_sources[0x53]	2306900	1			T1	2971		T2	805		T3	12
valid_sources[0x54]	1569502	1			T1	2957		T2	706		T3	74
valid_sources[0x55]	3476961	1			T1	2942		T2	680		T3	78
valid_sources[0x56]	1482572	1			T1	2780		T2	678		T3	14
valid_sources[0x57]	1441866	1			T1	2873		T2	702		T3	41
valid_sources[0x58]	3035889	1			T1	2992		T2	733		T3	23
valid_sources[0x59]	1985557	1			T1	2896		T2	788		T3	20
valid_sources[0x5a]	1517987	1			T1	3055		T2	675		T3	56
valid_sources[0x5b]	2301396	1			T1	2886		T2	653		T3	62
valid_sources[0x5c]	1453073	1			T1	2987		T2	676		T3	3
valid_sources[0x5d]	1444839	1			T1	3445		T2	749		T3	19
valid_sources[0x5e]	1504120	1			T1	2997		T2	756		T3	35
valid_sources[0x5f]	1455369	1			T1	2983		T2	688		T3	5
valid_sources[0x60]	1442966	1			T1	2676		T2	756		T3	40
valid_sources[0x61]	1441636	1			T1	3024		T2	663		T3	56
valid_sources[0x62]	1450461	1			T1	3038		T2	803		T3	39
valid_sources[0x63]	1478496	1			T1	2789		T2	712		T3	28
valid_sources[0x64]	3479904	1			T1	3056		T2	678		T3	52
valid_sources[0x65]	1469310	1			T1	3241		T2	774		T3	16
valid_sources[0x66]	2603542	1			T1	3297		T2	714		T3	61
valid_sources[0x67]	3217426	1			T1	3069		T2	708		T3	70
valid_sources[0x68]	1527361	1			T1	2853		T2	769		T3	67
valid_sources[0x69]	2084975	1			T1	2700		T2	715		T3	44
valid_sources[0x6a]	1450335	1			T1	3320		T2	714		T3	41
valid_sources[0x6b]	1440170	1			T1	2966		T2	638		T3	59
valid_sources[0x6c]	2098905	1			T1	3050		T2	820		T3	7
valid_sources[0x6d]	1446827	1			T1	2932		T2	717		T3	16
valid_sources[0x6e]	1450291	1			T1	3069		T2	717		T3	31
valid_sources[0x6f]	1552352	1			T1	2824		T2	703		T3	73
valid_sources[0x70]	1444135	1			T1	2656		T2	665		T3	14
valid_sources[0x71]	3478056	1			T1	3018		T2	694		T3	11
valid_sources[0x72]	1444860	1			T1	2719		T2	662		T3	46
valid_sources[0x73]	1443169	1			T1	2994		T2	648		T3	7
valid_sources[0x74]	2316634	1			T1	2513		T2	799		T3	93
valid_sources[0x75]	2105878	1			T1	2640		T2	680		T3	92
valid_sources[0x76]	1450282	1			T1	3239		T2	737		T3	62
valid_sources[0x77]	1441806	1			T1	3507		T2	731		T3	23
valid_sources[0x78]	1445653	1			T1	3019		T2	740		T3	13
valid_sources[0x79]	1440229	1			T1	2808		T2	720		T3	31
valid_sources[0x7a]	1442318	1			T1	3020		T2	818		T3	44
valid_sources[0x7b]	1444933	1			T1	2789		T2	825		T3	32
valid_sources[0x7c]	1445768	1			T1	3127		T2	761		T3	50
valid_sources[0x7d]	1450984	1			T1	2869		T2	703		T3	38
valid_sources[0x7e]	1442794	1			T1	3085		T2	735		T3	40
valid_sources[0x7f]	1604105	1			T1	2835		T2	721		T3	25
valid_sources[0x80]	1453621	1			T1	2640		T2	740		T3	66

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

87839209

1

T1

136357

T2

41333

T3

8148

values[0x0]

all_enables

biggest_size

61879457

1

T1

99323

T2

67204

T3

700

values[0x1]

all_enables

biggest_size

53259938

1

T1

84035

T2

67342

T3

700