Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	254904211	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

200193509

1

T1

8331

T2

167996

T3

53

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	240105351	1			T1	9528		T2	174259		T3	5
values[0x0]	103321734	1			T1	1962		T2	42110		T3	33
values[0x1]	111670635	1			T1	2077		T2	45521		T3	21

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	198727890	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

256369830

1

T1

9569

T2

188842

T3

56

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1979808	1			T1	5		T2	1071		T4	15
valid_sources[0x01]	1333543	1			T1	8		T2	926		T4	15
valid_sources[0x02]	1328829	1			T1	8		T2	942		T4	9
valid_sources[0x03]	1327867	1			T1	5		T2	969		T4	8
valid_sources[0x04]	1337656	1			T1	5		T2	1000		T4	13
valid_sources[0x05]	1357783	1			T1	10		T2	1063		T4	6
valid_sources[0x06]	1319573	1			T1	5		T2	1055		T4	25
valid_sources[0x07]	1333906	1			T1	12161		T2	971		T4	15
valid_sources[0x08]	1350767	1			T1	5		T2	1033		T4	16
valid_sources[0x09]	1328445	1			T1	10		T2	1075		T4	14
valid_sources[0x0a]	1320182	1			T1	6		T2	881		T4	7
valid_sources[0x0b]	1326484	1			T1	10		T2	936		T4	37
valid_sources[0x0c]	2187003	1			T1	5		T2	1060		T4	8
valid_sources[0x0d]	3736695	1			T1	7		T2	1010		T4	3
valid_sources[0x0e]	1340981	1			T1	6		T2	1033		T4	14
valid_sources[0x0f]	1348125	1			T1	4		T2	981		T4	6
valid_sources[0x10]	1321946	1			T1	3		T2	1093		T4	12
valid_sources[0x11]	1820187	1			T1	4		T2	1033		T4	13
valid_sources[0x12]	2249174	1			T1	6		T2	1022		T4	7
valid_sources[0x13]	2873113	1			T1	3		T2	965		T4	18
valid_sources[0x14]	1446348	1			T1	6		T2	1069		T4	9
valid_sources[0x15]	1334802	1			T1	7		T2	1039		T4	18
valid_sources[0x16]	3820779	1			T1	5		T2	1057		T4	4
valid_sources[0x17]	1327439	1			T1	6		T2	956		T4	6
valid_sources[0x18]	3834744	1			T1	5		T2	1010		T4	15
valid_sources[0x19]	1332772	1			T1	7		T2	1032		T4	3
valid_sources[0x1a]	6275499	1			T1	11		T2	1031		T4	3
valid_sources[0x1b]	1340299	1			T1	2		T2	1003		T4	17
valid_sources[0x1c]	1333615	1			T1	4		T2	1000		T4	17
valid_sources[0x1d]	1327888	1			T1	3		T2	910		T4	4
valid_sources[0x1e]	1363770	1			T1	3		T2	949		T4	20
valid_sources[0x1f]	1328563	1			T1	8		T2	966		T4	12
valid_sources[0x20]	3441845	1			T1	11		T2	932		T4	1
valid_sources[0x21]	1408076	1			T1	3		T2	954		T3	1
valid_sources[0x22]	1326638	1			T1	6		T2	1025		T4	13
valid_sources[0x23]	1322385	1			T1	3		T2	982		T4	3
valid_sources[0x24]	1324712	1			T1	5		T2	1239		T4	7
valid_sources[0x25]	1479701	1			T1	5		T2	1074		T4	15
valid_sources[0x26]	1339570	1			T1	3		T2	1081		T4	4
valid_sources[0x27]	2723013	1			T1	3		T2	997		T4	3
valid_sources[0x28]	1514586	1			T1	5		T2	994		T4	3
valid_sources[0x29]	1331032	1			T1	5		T2	870		T4	22
valid_sources[0x2a]	1982121	1			T1	1		T2	991		T4	17
valid_sources[0x2b]	1792829	1			T1	6		T2	1193		T3	10
valid_sources[0x2c]	1328718	1			T1	6		T2	967		T4	2
valid_sources[0x2d]	1320006	1			T1	8		T2	1053		T4	4
valid_sources[0x2e]	2905929	1			T1	3		T2	998		T4	7
valid_sources[0x2f]	2697089	1			T1	6		T2	917		T4	3
valid_sources[0x30]	1350868	1			T1	6		T2	968		T4	2
valid_sources[0x31]	1332096	1			T1	8		T2	1144		T4	27
valid_sources[0x32]	1407321	1			T1	7		T2	1041		T4	3
valid_sources[0x33]	1327095	1			T1	5		T2	1142		T4	7
valid_sources[0x34]	3753417	1			T1	7		T2	983		T4	9
valid_sources[0x35]	1404528	1			T1	8		T2	1110		T4	8
valid_sources[0x36]	1321027	1			T1	10		T2	969		T4	10
valid_sources[0x37]	1326763	1			T1	4		T2	1075		T4	21
valid_sources[0x38]	1439813	1			T1	3		T2	1055		T4	4
valid_sources[0x39]	1782360	1			T1	2		T2	1008		T4	5
valid_sources[0x3a]	1325285	1			T1	4		T2	959		T4	10
valid_sources[0x3b]	1331546	1			T1	1		T2	859		T4	16
valid_sources[0x3c]	3745114	1			T1	2		T2	1141		T4	16
valid_sources[0x3d]	3741986	1			T1	5		T2	1028		T4	12
valid_sources[0x3e]	1797257	1			T1	9		T2	985		T4	1
valid_sources[0x3f]	3382407	1			T1	1		T2	1182		T4	7
valid_sources[0x40]	1322995	1			T1	9		T2	915		T4	6
valid_sources[0x41]	1371861	1			T1	6		T2	1010		T4	17
valid_sources[0x42]	1375451	1			T1	4		T2	912		T4	19
valid_sources[0x43]	1334599	1			T1	11		T2	1012		T4	23
valid_sources[0x44]	2892964	1			T1	7		T2	915		T4	13
valid_sources[0x45]	1332426	1			T1	5		T2	999		T4	17
valid_sources[0x46]	2278256	1			T1	9		T2	998		T4	10
valid_sources[0x47]	1316721	1			T1	5		T2	1027		T4	5
valid_sources[0x48]	1354630	1			T1	8		T2	1032		T4	6
valid_sources[0x49]	1785987	1			T1	3		T2	987		T4	9
valid_sources[0x4a]	1339352	1			T1	7		T2	915		T4	9
valid_sources[0x4b]	1325513	1			T1	5		T2	1051		T4	7
valid_sources[0x4c]	5434771	1			T1	4		T2	1015		T4	16
valid_sources[0x4d]	1325777	1			T1	3		T2	1007		T4	3
valid_sources[0x4e]	1326632	1			T1	6		T2	920		T4	9
valid_sources[0x4f]	1663448	1			T1	5		T2	898		T4	4
valid_sources[0x50]	1328621	1			T1	3		T2	961		T4	6
valid_sources[0x51]	1326444	1			T1	6		T2	1174		T4	5
valid_sources[0x52]	2169314	1			T1	6		T2	940		T4	14
valid_sources[0x53]	1967792	1			T1	5		T2	1144		T4	11
valid_sources[0x54]	1388129	1			T1	8		T2	991		T3	7
valid_sources[0x55]	1462601	1			T1	3		T2	1016		T4	8
valid_sources[0x56]	1322961	1			T1	3		T2	1033		T4	8
valid_sources[0x57]	4629313	1			T1	5		T2	988		T4	29
valid_sources[0x58]	3739125	1			T1	6		T2	1065		T4	19
valid_sources[0x59]	1333285	1			T1	3		T2	989		T4	8
valid_sources[0x5a]	1555112	1			T1	10		T2	856		T3	16
valid_sources[0x5b]	1330555	1			T1	4		T2	1111		T4	4
valid_sources[0x5c]	1328870	1			T1	9		T2	1013		T4	5
valid_sources[0x5d]	1320141	1			T1	6		T2	1059		T4	15
valid_sources[0x5e]	3122344	1			T1	7		T2	1132		T4	4
valid_sources[0x5f]	1331849	1			T1	6		T2	1117		T4	2
valid_sources[0x60]	1340052	1			T1	5		T2	1180		T4	11
valid_sources[0x61]	1325979	1			T1	9		T2	1029		T4	9
valid_sources[0x62]	2175231	1			T1	7		T2	1035		T4	8
valid_sources[0x63]	1322937	1			T1	4		T2	909		T4	8
valid_sources[0x64]	1407241	1			T1	5		T2	1100		T4	10
valid_sources[0x65]	1325899	1			T1	5		T2	1070		T4	11
valid_sources[0x66]	2067539	1			T1	7		T2	973		T4	22
valid_sources[0x67]	1319126	1			T1	4		T2	962		T4	13
valid_sources[0x68]	1335971	1			T1	5		T2	1117		T4	1
valid_sources[0x69]	1323550	1			T1	5		T2	1084		T4	5
valid_sources[0x6a]	3373604	1			T1	3		T2	1061		T4	16
valid_sources[0x6b]	1341242	1			T1	6		T2	1044		T4	12
valid_sources[0x6c]	1329187	1			T1	2		T2	1090		T4	15
valid_sources[0x6d]	1324663	1			T1	6		T2	954		T3	4
valid_sources[0x6e]	1594411	1			T1	10		T2	1060		T4	14
valid_sources[0x6f]	3374839	1			T1	4		T2	981		T4	12
valid_sources[0x70]	2241072	1			T1	6		T2	1033		T4	15
valid_sources[0x71]	1509702	1			T1	1		T2	1135		T4	14
valid_sources[0x72]	2194907	1			T1	1		T2	906		T4	10
valid_sources[0x73]	1407216	1			T1	4		T2	1082		T4	5
valid_sources[0x74]	1326097	1			T1	6		T2	1053		T4	16
valid_sources[0x75]	1352163	1			T1	8		T2	1091		T4	16
valid_sources[0x76]	1324531	1			T1	9		T2	1058		T4	20
valid_sources[0x77]	1326614	1			T1	5		T2	910		T21	1
valid_sources[0x78]	1337108	1			T1	6		T2	982		T4	14
valid_sources[0x79]	1338934	1			T1	8		T2	1037		T4	8
valid_sources[0x7a]	1324086	1			T1	6		T2	1151		T4	23
valid_sources[0x7b]	1325289	1			T1	5		T2	982		T4	17
valid_sources[0x7c]	1322996	1			T1	4		T2	1160		T4	8
valid_sources[0x7d]	1331123	1			T1	8		T2	1057		T21	1
valid_sources[0x7e]	1328983	1			T1	6		T2	1053		T4	3
valid_sources[0x7f]	1364822	1			T1	3		T2	978		T4	16
valid_sources[0x80]	3372144	1			T1	7		T2	1190		T4	14

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

87178878

1

T1

6161

T2

117127

T3

2

values[0x0]

all_enables

biggest_size

60805938

1

T1

1219

T2

26689

T3

32

values[0x1]

all_enables

biggest_size

52208693

1

T1

951

T2

24180

T3

19