Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
341150 |
1 |
|
|
T3 |
3460 |
|
T14 |
223 |
|
T5 |
3 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
174791 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
124833 |
1 |
|
|
T3 |
97 |
|
T14 |
220 |
|
T5 |
3 |
seven_bytes |
6007 |
1 |
|
|
T3 |
89 |
|
T26 |
15 |
|
T30 |
100 |
six_bytes |
6025 |
1 |
|
|
T3 |
89 |
|
T26 |
14 |
|
T30 |
118 |
five_bytes |
5907 |
1 |
|
|
T3 |
78 |
|
T26 |
16 |
|
T30 |
104 |
four_bytes |
5915 |
1 |
|
|
T3 |
96 |
|
T26 |
20 |
|
T30 |
127 |
three_bytes |
5804 |
1 |
|
|
T3 |
91 |
|
T26 |
12 |
|
T30 |
105 |
two_bytes |
5891 |
1 |
|
|
T3 |
93 |
|
T26 |
24 |
|
T30 |
99 |
one_byte |
5977 |
1 |
|
|
T3 |
85 |
|
T26 |
15 |
|
T30 |
94 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
334611 |
1 |
|
|
T3 |
3418 |
|
T14 |
217 |
|
T5 |
3 |
auto[1] |
6539 |
1 |
|
|
T3 |
42 |
|
T14 |
6 |
|
T26 |
8 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
341150 |
1 |
|
|
T3 |
3460 |
|
T14 |
223 |
|
T5 |
3 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
341122 |
1 |
|
|
T3 |
3460 |
|
T14 |
223 |
|
T5 |
3 |
auto[1] |
28 |
1 |
|
|
T31 |
1 |
|
T29 |
1 |
|
T169 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2300 |
1 |
|
|
T3 |
5 |
|
T14 |
3 |
|
T26 |
1 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6539 |
1 |
|
|
T3 |
42 |
|
T14 |
6 |
|
T26 |
8 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
171173 |
1 |
|
|
T3 |
1311 |
|
T14 |
46 |
|
T26 |
552 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
87926 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
62429 |
1 |
|
|
T3 |
34 |
|
T14 |
45 |
|
T26 |
14 |
seven_bytes |
3009 |
1 |
|
|
T3 |
35 |
|
T26 |
16 |
|
T30 |
71 |
six_bytes |
2969 |
1 |
|
|
T3 |
41 |
|
T26 |
12 |
|
T30 |
76 |
five_bytes |
3006 |
1 |
|
|
T3 |
24 |
|
T26 |
22 |
|
T30 |
78 |
four_bytes |
2926 |
1 |
|
|
T3 |
27 |
|
T26 |
14 |
|
T30 |
68 |
three_bytes |
2939 |
1 |
|
|
T3 |
29 |
|
T26 |
14 |
|
T30 |
82 |
two_bytes |
2959 |
1 |
|
|
T3 |
42 |
|
T26 |
13 |
|
T30 |
61 |
one_byte |
3010 |
1 |
|
|
T3 |
33 |
|
T26 |
22 |
|
T30 |
72 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
167869 |
1 |
|
|
T3 |
1297 |
|
T14 |
44 |
|
T26 |
548 |
auto[1] |
3304 |
1 |
|
|
T3 |
14 |
|
T14 |
2 |
|
T26 |
4 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
171173 |
1 |
|
|
T3 |
1311 |
|
T14 |
46 |
|
T26 |
552 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
171169 |
1 |
|
|
T3 |
1311 |
|
T14 |
46 |
|
T26 |
552 |
auto[1] |
4 |
1 |
|
|
T170 |
1 |
|
T171 |
1 |
|
T172 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1160 |
1 |
|
|
T3 |
1 |
|
T14 |
1 |
|
T30 |
7 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3304 |
1 |
|
|
T3 |
14 |
|
T14 |
2 |
|
T26 |
4 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164447 |
1 |
|
|
T3 |
1280 |
|
T30 |
1457 |
|
T27 |
780 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
81557 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
63902 |
1 |
|
|
T3 |
37 |
|
T30 |
42 |
|
T27 |
768 |
seven_bytes |
2635 |
1 |
|
|
T3 |
26 |
|
T30 |
40 |
|
T28 |
57 |
six_bytes |
2817 |
1 |
|
|
T3 |
41 |
|
T30 |
48 |
|
T28 |
66 |
five_bytes |
2665 |
1 |
|
|
T3 |
32 |
|
T30 |
31 |
|
T28 |
43 |
four_bytes |
2638 |
1 |
|
|
T3 |
26 |
|
T30 |
22 |
|
T28 |
60 |
three_bytes |
2736 |
1 |
|
|
T3 |
26 |
|
T30 |
39 |
|
T28 |
72 |
two_bytes |
2759 |
1 |
|
|
T3 |
38 |
|
T30 |
34 |
|
T28 |
51 |
one_byte |
2738 |
1 |
|
|
T3 |
41 |
|
T30 |
46 |
|
T28 |
47 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
161161 |
1 |
|
|
T3 |
1266 |
|
T30 |
1439 |
|
T27 |
756 |
auto[1] |
3286 |
1 |
|
|
T3 |
14 |
|
T30 |
18 |
|
T27 |
24 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164447 |
1 |
|
|
T3 |
1280 |
|
T30 |
1457 |
|
T27 |
780 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164431 |
1 |
|
|
T3 |
1280 |
|
T30 |
1457 |
|
T27 |
780 |
auto[1] |
16 |
1 |
|
|
T74 |
1 |
|
T173 |
1 |
|
T171 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1151 |
1 |
|
|
T3 |
1 |
|
T30 |
2 |
|
T27 |
12 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3286 |
1 |
|
|
T3 |
14 |
|
T30 |
18 |
|
T27 |
24 |