Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10350	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8948	1			T1	17		T3	17		T13	3
len_5001_7500	14441	1			T1	17		T3	17		T12	33
len_2501_5000	9229	1			T1	17		T3	17		T12	34
len_1025_2500	5427	1			T1	10		T3	10		T12	20
len_769_1024	6084	1			T1	2		T2	26		T3	2
len_513_768	6713	1			T1	2		T2	27		T3	2
len_257_512	21188	1			T1	2		T2	21		T3	2
len_0_256	257760	1			T1	290		T2	24		T3	290
len_keccak_block_sizes[72]	729	1			T1	2		T3	2		T12	2
len_keccak_block_sizes[104]	627	1			T1	2		T3	2		T17	2
len_keccak_block_sizes[136]	530	1			T1	2		T3	2		T31	1
len_keccak_block_sizes[144]	419	1			T1	2		T3	2		T13	1
len_keccak_block_sizes[168]	326	1			T15	1		T101	3		T28	1
len_1	767	1			T1	2		T3	2		T12	2
len_0	1191	1			T1	2		T2	1		T3	2