Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	627	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5575	1			T2	18		T13	15		T15	34
len_601_800	12456	1			T2	33		T13	29		T15	51
len_401_600	8282	1			T2	20		T13	16		T15	31
len_201_400	16442	1			T2	9		T13	10		T15	19
len_65_200	73721	1			T2	10		T13	45		T15	13
len_min_for_xof_require_squeeze	1005	1			T2	1		T13	1		T79	1
len_keccak_block_sizes[72]	754	1			T101	9		T32	1		T160	9
len_keccak_block_sizes[104]	766	1			T13	1		T101	9		T113	1
len_keccak_block_sizes[136]	743	1			T16	1		T101	9		T113	1
len_keccak_block_sizes[144]	289	1			T27	1		T33	1		T161	1
len_keccak_block_sizes[168]	281	1			T113	1		T39	1		T161	1
len_datapath_width	14139	1			T12	246		T13	12		T14	3
len_2_63	214568	1			T1	390		T2	8		T3	390
len_1	47	1			T16	1		T113	1		T44	1