Unified Coverage Report :: Group :: kmac_env_pkg::app_cg_wrap::app_cg

Group : kmac_env_pkg::app_cg_wrap::app_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
88.89	88.89	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

3 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
AppKeymgr_cg	88.89	1	100	1	64	64
AppLc_cg	88.89	1	100	1	64	64
AppRom_cg	88.89	1	100	1	64	64

---

Group Instance : AppKeymgr_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
88.89	1	100	1	64	64

---

Summary for Group Instance AppKeymgr_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	16	2	14	87.50
Crosses	2	0	2	100.00

Variables for Group Instance AppKeymgr_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
app_err	2	1	1	50.00	100	1	1	2
data_strb	8	0	8	100.00	100	1	1	0
done	2	0	2	100.00	100	1	1	2
in_keccak_rounds	2	1	1	50.00	100	1	1	2
single_data_beat	2	0	2	100.00	100	1	1	2

Crosses for Group Instance AppKeymgr_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
partial_data_on_last_beat	1	0	1	100.00	100	1	1	0
done_in_keccak_rounds	1	0	1	100.00	100	1	1	0

---

Group Instance : AppLc_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
88.89	1	100	1	64	64

---

Summary for Group Instance AppLc_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	16	2	14	87.50
Crosses	2	0	2	100.00

Variables for Group Instance AppLc_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
app_err	2	1	1	50.00	100	1	1	2
data_strb	8	0	8	100.00	100	1	1	0
done	2	0	2	100.00	100	1	1	2
in_keccak_rounds	2	1	1	50.00	100	1	1	2
single_data_beat	2	0	2	100.00	100	1	1	2

Crosses for Group Instance AppLc_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
partial_data_on_last_beat	1	0	1	100.00	100	1	1	0
done_in_keccak_rounds	1	0	1	100.00	100	1	1	0

---

Group Instance : AppRom_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
88.89	1	100	1	64	64

---

Summary for Group Instance AppRom_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	16	2	14	87.50
Crosses	2	0	2	100.00

Variables for Group Instance AppRom_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
app_err	2	1	1	50.00	100	1	1	2
data_strb	8	0	8	100.00	100	1	1	0
done	2	0	2	100.00	100	1	1	2
in_keccak_rounds	2	1	1	50.00	100	1	1	2
single_data_beat	2	0	2	100.00	100	1	1	2

Crosses for Group Instance AppRom_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
partial_data_on_last_beat	1	0	1	100.00	100	1	1	0
done_in_keccak_rounds	1	0	1	100.00	100	1	1	0

Summary for Variable app_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for app_err

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

324224

1

T4

591

T16

3105

T23

2472

---

Summary for Variable data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for data_strb

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	155538	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
full_data_beat	131619	1			T4	10		T16	74		T23	2437
seven_bytes	5253	1			T4	11		T16	91		T26	56
six_bytes	5129	1			T4	19		T16	76		T26	47
five_bytes	5410	1			T4	17		T16	81		T26	64
four_bytes	5318	1			T4	21		T16	78		T26	48
three_bytes	5321	1			T4	18		T16	83		T26	52
two_bytes	5357	1			T4	21		T16	86		T26	55
one_byte	5279	1			T4	16		T16	73		T26	57

---

Summary for Variable done

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for done

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

317680

1

T4

583

T16

3069

T23

2402

auto[1]

6544

1

T4

8

T16

36

T23

70

---

Summary for Variable in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for in_keccak_rounds

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

324224

1

T4

591

T16

3105

T23

2472

---

Summary for Variable single_data_beat

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for single_data_beat

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

324200

1

T4

591

T16

3104

T23

2472

auto[1]

24

1

T16

1

T25

1

T45

3

---

Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

2396

1

T4

1

T16

5

T23

35

---

Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

6544

1

T4

8

T16

36

T23

70

Summary for Variable app_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for app_err

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

169411

1

T4

334

T16

1787

T23

926

---

Summary for Variable data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for data_strb

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	81723	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
full_data_beat	68280	1			T4	11		T16	52		T23	911
seven_bytes	2797	1			T4	9		T16	47		T26	78
six_bytes	2722	1			T4	9		T16	53		T26	53
five_bytes	2772	1			T4	12		T16	47		T26	71
four_bytes	2862	1			T4	6		T16	44		T26	78
three_bytes	2795	1			T4	7		T16	42		T26	62
two_bytes	2760	1			T4	12		T16	46		T26	69
one_byte	2700	1			T4	7		T16	56		T26	74

---

Summary for Variable done

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for done

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

166099

1

T4

328

T16

1767

T23

896

auto[1]

3312

1

T4

6

T16

20

T23

30

---

Summary for Variable in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for in_keccak_rounds

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

169411

1

T4

334

T16

1787

T23

926

---

Summary for Variable single_data_beat

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for single_data_beat

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

169399

1

T4

334

T16

1787

T23

926

auto[1]

12

1

T47

2

T173

1

T174

1

---

Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

1233

1

T4

2

T16

2

T23

15

---

Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

3312

1

T4

6

T16

20

T23

30

Summary for Variable app_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for app_err

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

160223

1

T4

466

T16

975

T23

969

---

Summary for Variable data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for data_strb

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	80326	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
full_data_beat	60517	1			T4	14		T16	24		T23	955
seven_bytes	2788	1			T4	15		T16	26		T26	75
six_bytes	2724	1			T4	12		T16	35		T26	70
five_bytes	2920	1			T4	21		T16	30		T26	71
four_bytes	2713	1			T4	11		T16	31		T26	72
three_bytes	2669	1			T4	9		T16	22		T26	53
two_bytes	2744	1			T4	9		T16	19		T26	67
one_byte	2822	1			T4	13		T16	22		T26	58

---

Summary for Variable done

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for done

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

157057

1

T4

462

T16

959

T23

941

auto[1]

3166

1

T4

4

T16

16

T23

28

---

Summary for Variable in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for in_keccak_rounds

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

160223

1

T4

466

T16

975

T23

969

---

Summary for Variable single_data_beat

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for single_data_beat

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

160210

1

T4

466

T16

975

T23

969

auto[1]

13

1

T26

1

T108

1

T47

2

---

Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

1148

1

T16

1

T23

14

T26

3

---

Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

3166

1

T4

4

T16

16

T23

28