Group : cip_base_pkg::resets_cg
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Group : cip_base_pkg::resets_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
cip_base_pkg.dut_and_edn_rsts 100.00 1 100 1 64 64




Group Instance : cip_base_pkg.dut_and_edn_rsts
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance cip_base_pkg.dut_and_edn_rsts

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance cip_base_pkg.dut_and_edn_rsts
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
resets_trans 4 0 4 100.00 100 1 1 0


Summary for Variable resets_trans

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 4 0 4 100.00


User Defined Bins for resets_trans

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
rst1_start_last_end_first 218 1 T84 3 T6 1 T46 3
rst1_start_first_end_last 282 1 T4 1 T26 1 T83 3
rst1_start_last_end_last 562 1 T83 1 T84 2 T46 2
rst1_start_first_end_first 404 1 T5 1 T26 1 T83 3

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%