SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.sha3pad_assert_cov_if | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
97.24 | 96.27 | 93.33 | 100.00 | 100.00 | 93.85 | 100.00 | dut |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 2 | 2 | 100.00 | 2 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 2 | 2 | 100.00 | 2 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
ProcessToRun_A | 2147483647 | 346545 | 0 | 0 |
RunThenComplete_M | 2147483647 | 3062013 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 2147483647 | 346545 | 0 | 0 |
T1 | 302370 | 144 | 0 | 0 |
T2 | 260162 | 2337 | 0 | 0 |
T3 | 935321 | 246 | 0 | 0 |
T13 | 820230 | 178 | 0 | 0 |
T14 | 218303 | 2265 | 0 | 0 |
T15 | 981044 | 390 | 0 | 0 |
T16 | 651371 | 390 | 0 | 0 |
T17 | 136266 | 310 | 0 | 0 |
T18 | 570371 | 125 | 0 | 0 |
T19 | 135649 | 310 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 2147483647 | 3062013 | 0 | 0 |
T1 | 302370 | 360 | 0 | 0 |
T2 | 260162 | 13147 | 0 | 0 |
T3 | 935321 | 5427 | 0 | 0 |
T13 | 820230 | 6817 | 0 | 0 |
T14 | 218303 | 12979 | 0 | 0 |
T15 | 981044 | 5542 | 0 | 0 |
T16 | 651371 | 5542 | 0 | 0 |
T17 | 136266 | 5462 | 0 | 0 |
T18 | 570371 | 646 | 0 | 0 |
T19 | 135649 | 5462 | 0 | 0 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |