Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
333321 |
1 |
|
|
T16 |
5991 |
|
T22 |
666 |
|
T23 |
1281 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
191485 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
96118 |
1 |
|
|
T16 |
164 |
|
T22 |
260 |
|
T23 |
1263 |
seven_bytes |
6569 |
1 |
|
|
T16 |
168 |
|
T22 |
15 |
|
T28 |
88 |
six_bytes |
6515 |
1 |
|
|
T16 |
179 |
|
T22 |
8 |
|
T28 |
73 |
five_bytes |
6635 |
1 |
|
|
T16 |
172 |
|
T22 |
13 |
|
T28 |
82 |
four_bytes |
6431 |
1 |
|
|
T16 |
150 |
|
T22 |
3 |
|
T28 |
73 |
three_bytes |
6559 |
1 |
|
|
T16 |
163 |
|
T22 |
12 |
|
T28 |
73 |
two_bytes |
6482 |
1 |
|
|
T16 |
129 |
|
T22 |
12 |
|
T28 |
82 |
one_byte |
6527 |
1 |
|
|
T16 |
159 |
|
T22 |
10 |
|
T28 |
80 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
327433 |
1 |
|
|
T16 |
5911 |
|
T22 |
654 |
|
T23 |
1245 |
auto[1] |
5888 |
1 |
|
|
T16 |
80 |
|
T22 |
12 |
|
T23 |
36 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
333321 |
1 |
|
|
T16 |
5991 |
|
T22 |
666 |
|
T23 |
1281 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
333301 |
1 |
|
|
T16 |
5991 |
|
T22 |
666 |
|
T23 |
1280 |
auto[1] |
20 |
1 |
|
|
T23 |
1 |
|
T142 |
1 |
|
T143 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1878 |
1 |
|
|
T16 |
14 |
|
T22 |
3 |
|
T23 |
18 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
5888 |
1 |
|
|
T16 |
80 |
|
T22 |
12 |
|
T23 |
36 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
151120 |
1 |
|
|
T5 |
2 |
|
T16 |
2938 |
|
T22 |
74 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
85408 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
45568 |
1 |
|
|
T5 |
2 |
|
T16 |
68 |
|
T22 |
73 |
seven_bytes |
2864 |
1 |
|
|
T16 |
83 |
|
T28 |
33 |
|
T24 |
30 |
six_bytes |
2987 |
1 |
|
|
T16 |
83 |
|
T28 |
28 |
|
T24 |
23 |
five_bytes |
2878 |
1 |
|
|
T16 |
80 |
|
T28 |
25 |
|
T24 |
23 |
four_bytes |
2940 |
1 |
|
|
T16 |
79 |
|
T28 |
30 |
|
T24 |
32 |
three_bytes |
2719 |
1 |
|
|
T16 |
85 |
|
T28 |
27 |
|
T24 |
24 |
two_bytes |
2888 |
1 |
|
|
T16 |
78 |
|
T28 |
29 |
|
T24 |
25 |
one_byte |
2868 |
1 |
|
|
T16 |
82 |
|
T28 |
25 |
|
T24 |
28 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
148370 |
1 |
|
|
T5 |
2 |
|
T16 |
2912 |
|
T22 |
72 |
auto[1] |
2750 |
1 |
|
|
T16 |
26 |
|
T22 |
2 |
|
T23 |
2 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
151120 |
1 |
|
|
T5 |
2 |
|
T16 |
2938 |
|
T22 |
74 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
151109 |
1 |
|
|
T5 |
2 |
|
T16 |
2938 |
|
T22 |
74 |
auto[1] |
11 |
1 |
|
|
T27 |
1 |
|
T104 |
1 |
|
T144 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
875 |
1 |
|
|
T16 |
7 |
|
T22 |
1 |
|
T23 |
1 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2750 |
1 |
|
|
T16 |
26 |
|
T22 |
2 |
|
T23 |
2 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164093 |
1 |
|
|
T16 |
2035 |
|
T22 |
119 |
|
T23 |
165 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
93184 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
48728 |
1 |
|
|
T16 |
55 |
|
T22 |
117 |
|
T23 |
163 |
seven_bytes |
3221 |
1 |
|
|
T16 |
52 |
|
T28 |
17 |
|
T24 |
39 |
six_bytes |
3193 |
1 |
|
|
T16 |
48 |
|
T28 |
16 |
|
T24 |
39 |
five_bytes |
3106 |
1 |
|
|
T16 |
51 |
|
T28 |
11 |
|
T24 |
31 |
four_bytes |
3187 |
1 |
|
|
T16 |
57 |
|
T28 |
19 |
|
T24 |
56 |
three_bytes |
3141 |
1 |
|
|
T16 |
66 |
|
T28 |
21 |
|
T24 |
45 |
two_bytes |
3188 |
1 |
|
|
T16 |
40 |
|
T28 |
14 |
|
T24 |
40 |
one_byte |
3145 |
1 |
|
|
T16 |
56 |
|
T28 |
18 |
|
T24 |
34 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
161131 |
1 |
|
|
T16 |
2005 |
|
T22 |
115 |
|
T23 |
161 |
auto[1] |
2962 |
1 |
|
|
T16 |
30 |
|
T22 |
4 |
|
T23 |
4 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164093 |
1 |
|
|
T16 |
2035 |
|
T22 |
119 |
|
T23 |
165 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164076 |
1 |
|
|
T16 |
2035 |
|
T22 |
119 |
|
T23 |
165 |
auto[1] |
17 |
1 |
|
|
T26 |
1 |
|
T42 |
1 |
|
T143 |
2 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
960 |
1 |
|
|
T16 |
5 |
|
T22 |
2 |
|
T23 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2962 |
1 |
|
|
T16 |
30 |
|
T22 |
4 |
|
T23 |
4 |