Group : dv_base_reg_pkg::mubi_cov#(4,32'h00000006,32'h00000009)::mubi_cg
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Group : dv_base_reg_pkg::mubi_cov#(4,32'h00000006,32'h00000009)::mubi_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_mubi_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if 100.00 1 100 1 64 64




Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 602 1 T22 13 T23 7 T24 3
others[1] 631 1 T22 30 T23 6 T24 5
others[2] 575 1 T22 23 T23 8 T24 5
others[3] 1075 1 T22 49 T23 6 T24 11
false 353257 1 T1 247 T2 2 T3 2338
true 350295 1 T1 246 T3 2337 T4 82


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1015 1 T13 11 T17 18 T20 6
others[1] 597 1 T22 28 T23 5 T24 3
others[2] 609 1 T22 26 T23 6 T24 5
others[3] 1061 1 T22 42 T23 10 T24 9
false 353639 1 T1 247 T2 2 T3 2338
true 350278 1 T1 246 T3 2337 T4 82

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%