Unified Coverage Report :: Group :: kmac_env_pkg::app_cg_wrap::app_cfg_reg_cg

Group : kmac_env_pkg::app_cg_wrap::app_cfg_reg_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

3 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
AppKeymgr_cg_(1)	100.00	1	100	1	64	64
AppLc_cg_(1)	100.00	1	100	1	64	64
AppRom_cg_(1)	100.00	1	100	1	64	64

---

Group Instance : AppKeymgr_cg_(1)

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance AppKeymgr_cg_(1)

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	3	0	3	100.00

Variables for Group Instance AppKeymgr_cg_(1)

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
sw_configured_hash_mode	3	0	3	100.00	100	1	1	0

---

Group Instance : AppLc_cg_(1)

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance AppLc_cg_(1)

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	3	0	3	100.00

Variables for Group Instance AppLc_cg_(1)

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
sw_configured_hash_mode	3	0	3	100.00	100	1	1	0

---

Group Instance : AppRom_cg_(1)

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance AppRom_cg_(1)

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	3	0	3	100.00

Variables for Group Instance AppRom_cg_(1)

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
sw_configured_hash_mode	3	0	3	100.00	100	1	1	0

Summary for Variable sw_configured_hash_mode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for sw_configured_hash_mode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
cshake	1047	1			T22	2		T23	2		T24	5
shake	1118	1			T22	3		T23	3		T29	8
sha3	1148	1			T22	2		T23	2		T24	3

Summary for Variable sw_configured_hash_mode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for sw_configured_hash_mode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
cshake	540	1			T22	1		T23	1		T24	6
shake	548	1			T22	1		T23	1		T24	3
sha3	562	1			T22	2		T24	4		T29	4

Summary for Variable sw_configured_hash_mode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for sw_configured_hash_mode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
cshake	562	1			T22	1		T23	2		T24	4
shake	527	1			T24	3		T29	6		T40	3
sha3	568	1			T22	1		T23	1		T24	3