SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
push_pull_agent_pkg.uvm_test_top.env.m_kmac_app_agent[0].m_data_push_agent.cov::m_valid_ready_cg | 100.00 | 1 | 100 | 1 | 64 | 64 |
push_pull_agent_pkg.uvm_test_top.env.m_kmac_app_agent[1].m_data_push_agent.cov::m_valid_ready_cg | 100.00 | 1 | 100 | 1 | 64 | 64 |
push_pull_agent_pkg.uvm_test_top.env.m_kmac_app_agent[2].m_data_push_agent.cov::m_valid_ready_cg | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 4 | 0 | 4 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_valid_ready | 4 | 0 | 4 | 100.00 | 100 | 1 | 1 | 4 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 4 | 0 | 4 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_valid_ready | 4 | 0 | 4 | 100.00 | 100 | 1 | 1 | 4 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 4 | 0 | 4 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_valid_ready | 4 | 0 | 4 | 100.00 | 100 | 1 | 1 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 4 | 0 | 4 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 57377 | 1 | T12 | 1 | T17 | 1 | T21 | 24 | ||||
auto[1] | 19464 | 1 | T12 | 1 | T17 | 1 | T21 | 905 | ||||
auto[2] | 306796 | 1 | T12 | 5 | T22 | 3344 | T26 | 1236 | ||||
auto[3] | 326020 | 1 | T12 | 6 | T17 | 1 | T21 | 905 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 4 | 0 | 4 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 26489 | 1 | T12 | 1 | T21 | 15 | T22 | 516 | ||||
auto[1] | 8533 | 1 | T12 | 1 | T21 | 682 | T22 | 11 | ||||
auto[2] | 133109 | 1 | T12 | 31 | T22 | 1859 | T26 | 427 | ||||
auto[3] | 141147 | 1 | T12 | 32 | T21 | 682 | T22 | 1873 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 4 | 0 | 4 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 24902 | 1 | T12 | 1 | T21 | 539 | T22 | 14 | ||||
auto[1] | 11319 | 1 | T12 | 1 | T21 | 13 | T22 | 587 | ||||
auto[2] | 132357 | 1 | T12 | 120 | T21 | 1883 | T39 | 1861 | ||||
auto[3] | 143128 | 1 | T12 | 121 | T21 | 1902 | T22 | 587 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |