Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10355	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9106	1			T15	38		T19	3		T40	22
len_5001_7500	14653	1			T14	33		T15	36		T19	5
len_2501_5000	9276	1			T14	34		T15	36		T40	14
len_1025_2500	5426	1			T14	20		T15	22		T19	3
len_769_1024	6416	1			T1	10		T3	31		T14	4
len_513_768	6817	1			T1	16		T3	27		T14	3
len_257_512	21312	1			T1	14		T3	32		T14	4
len_0_256	257885	1			T1	12		T2	54		T3	23
len_keccak_block_sizes[72]	714	1			T14	2		T15	3		T67	2
len_keccak_block_sizes[104]	622	1			T15	3		T67	2		T195	3
len_keccak_block_sizes[136]	524	1			T15	3		T67	2		T195	3
len_keccak_block_sizes[144]	425	1			T15	3		T67	2		T195	3
len_keccak_block_sizes[168]	322	1			T15	3		T195	3		T87	3
len_1	774	1			T14	2		T15	3		T65	1
len_0	1212	1			T2	1		T14	2		T15	3