Group : kmac_env_pkg::app_cg_wrap::app_cfg_reg_cg
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Group : kmac_env_pkg::app_cg_wrap::app_cfg_reg_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

3 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
AppKeymgr_cg_(1) 100.00 1 100 1 64 64
AppLc_cg_(1) 100.00 1 100 1 64 64
AppRom_cg_(1) 100.00 1 100 1 64 64




Group Instance : AppKeymgr_cg_(1)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance AppKeymgr_cg_(1)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance AppKeymgr_cg_(1)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
sw_configured_hash_mode 3 0 3 100.00 100 1 1 0



Group Instance : AppLc_cg_(1)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance AppLc_cg_(1)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance AppLc_cg_(1)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
sw_configured_hash_mode 3 0 3 100.00 100 1 1 0



Group Instance : AppRom_cg_(1)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance AppRom_cg_(1)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance AppRom_cg_(1)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
sw_configured_hash_mode 3 0 3 100.00 100 1 1 0


Summary for Variable sw_configured_hash_mode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for sw_configured_hash_mode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
cshake 1162 1 T13 14 T19 9 T26 9
shake 1064 1 T13 5 T19 5 T26 9
sha3 1165 1 T13 12 T19 9 T26 10


Summary for Variable sw_configured_hash_mode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for sw_configured_hash_mode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
cshake 585 1 T13 7 T26 4 T27 2
shake 528 1 T13 9 T19 6 T26 3
sha3 579 1 T13 4 T19 1 T26 6


Summary for Variable sw_configured_hash_mode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for sw_configured_hash_mode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
cshake 566 1 T13 8 T19 1 T26 6
shake 523 1 T13 3 T19 3 T26 2
sha3 572 1 T13 3 T19 3 T26 6

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