Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 253337941 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 197059510 1 T1 1411 T2 14168 T3 12748



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 237996856 1 T1 1065 T2 12355 T3 13530
values[0x0] 102045355 1 T1 507 T2 1165 T3 3068
values[0x1] 110355240 1 T1 468 T2 1149 T3 3266



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 197513204 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 252884247 1 T1 1557 T2 14284 T3 14300



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1353088 1 T1 3 T2 65 T3 7
valid_sources[0x01] 1881207 1 T1 11 T2 52 T3 3
valid_sources[0x02] 1430477 1 T2 61 T3 7 T12 3522
valid_sources[0x03] 2973993 1 T1 22 T2 46 T3 3
valid_sources[0x04] 1339287 1 T1 12 T2 57 T3 13
valid_sources[0x05] 4210491 1 T1 24 T2 59 T3 1
valid_sources[0x06] 1327263 1 T1 11 T2 58 T3 10
valid_sources[0x07] 1365460 1 T1 1 T2 72 T3 4
valid_sources[0x08] 1789598 1 T1 8 T2 53 T3 3
valid_sources[0x09] 1332812 1 T2 65 T3 5 T12 3157
valid_sources[0x0a] 3735359 1 T2 44 T3 5 T12 3538
valid_sources[0x0b] 1327665 1 T2 70 T3 11 T12 3264
valid_sources[0x0c] 1330925 1 T1 8 T2 84 T3 7
valid_sources[0x0d] 1418253 1 T2 49 T3 6 T12 3670
valid_sources[0x0e] 1330517 1 T1 8 T2 55 T3 4
valid_sources[0x0f] 1558153 1 T2 57 T3 7 T12 3076
valid_sources[0x10] 2007890 1 T1 26 T2 49 T3 8
valid_sources[0x11] 2706500 1 T2 37 T3 7 T12 3227
valid_sources[0x12] 1335986 1 T2 57 T3 4 T12 3391
valid_sources[0x13] 2899025 1 T2 74 T3 4 T12 3050
valid_sources[0x14] 4190301 1 T1 47 T2 56 T3 4
valid_sources[0x15] 1331371 1 T1 7 T2 46 T3 5
valid_sources[0x16] 1328771 1 T2 73 T3 6 T12 3787
valid_sources[0x17] 1332200 1 T1 9 T2 55 T3 6
valid_sources[0x18] 1334947 1 T2 53 T3 3 T12 3364
valid_sources[0x19] 1344979 1 T1 5 T2 62 T3 3
valid_sources[0x1a] 1340437 1 T2 59 T3 8 T12 3390
valid_sources[0x1b] 5818394 1 T1 18 T2 55 T3 9
valid_sources[0x1c] 1335280 1 T1 1 T2 82 T3 1
valid_sources[0x1d] 1334660 1 T2 51 T3 4 T12 3799
valid_sources[0x1e] 1365065 1 T2 53 T3 5 T12 2859
valid_sources[0x1f] 2031946 1 T1 27 T2 60 T3 6
valid_sources[0x20] 3357019 1 T2 59 T3 6 T12 3508
valid_sources[0x21] 2139084 1 T1 29 T2 56 T3 4
valid_sources[0x22] 1482535 1 T2 59 T3 8 T12 2660
valid_sources[0x23] 1327859 1 T1 8 T2 51 T3 2
valid_sources[0x24] 1447152 1 T1 9 T2 85 T3 12
valid_sources[0x25] 1796697 1 T1 16 T2 57 T3 6
valid_sources[0x26] 1377712 1 T2 53 T3 4 T12 3169
valid_sources[0x27] 1322544 1 T1 10 T2 67 T3 5
valid_sources[0x28] 1332575 1 T2 67 T3 10 T12 3490
valid_sources[0x29] 1751608 1 T2 48 T3 5 T12 3609
valid_sources[0x2a] 1470487 1 T1 9 T2 57 T3 12
valid_sources[0x2b] 2741871 1 T1 6 T2 55 T3 4
valid_sources[0x2c] 3382721 1 T1 5 T2 57 T3 7
valid_sources[0x2d] 1334256 1 T1 2 T2 48 T3 7
valid_sources[0x2e] 1333294 1 T2 65 T3 2 T12 3556
valid_sources[0x2f] 2194690 1 T1 2 T2 57 T3 8
valid_sources[0x30] 1329553 1 T1 23 T2 53 T3 6
valid_sources[0x31] 1376284 1 T1 7 T2 43 T3 5
valid_sources[0x32] 1353717 1 T2 45 T3 5 T12 3403
valid_sources[0x33] 1329804 1 T1 17 T2 62 T3 2
valid_sources[0x34] 1333546 1 T1 1 T2 60 T3 7
valid_sources[0x35] 2009643 1 T1 18 T2 67 T3 5
valid_sources[0x36] 1330838 1 T1 13 T2 48 T3 5
valid_sources[0x37] 1786483 1 T2 42 T3 10 T12 2860
valid_sources[0x38] 1330215 1 T1 15 T2 68 T3 9
valid_sources[0x39] 1336181 1 T1 2 T2 70 T3 12
valid_sources[0x3a] 1371146 1 T1 9 T2 35 T3 3
valid_sources[0x3b] 1342871 1 T2 66 T3 3 T12 3015
valid_sources[0x3c] 2279090 1 T1 16 T2 64 T3 4
valid_sources[0x3d] 1915602 1 T1 18 T2 59 T3 7
valid_sources[0x3e] 1358002 1 T1 5 T2 60 T3 5
valid_sources[0x3f] 1330509 1 T1 6 T2 51 T3 6
valid_sources[0x40] 1374660 1 T2 46 T3 8 T12 3594
valid_sources[0x41] 1329206 1 T2 43 T3 9 T12 3629
valid_sources[0x42] 1324573 1 T2 46 T3 11 T12 3215
valid_sources[0x43] 1519124 1 T2 70 T3 2 T12 2681
valid_sources[0x44] 2306550 1 T2 51 T3 2 T12 3162
valid_sources[0x45] 1331406 1 T2 70 T3 3 T12 3695
valid_sources[0x46] 1384840 1 T1 5 T2 69 T3 7
valid_sources[0x47] 2328129 1 T2 68 T3 6 T12 2946
valid_sources[0x48] 1338000 1 T1 26 T2 62 T3 6
valid_sources[0x49] 1354246 1 T2 62 T3 8 T12 3359
valid_sources[0x4a] 1334118 1 T2 61 T3 7 T12 2999
valid_sources[0x4b] 1799162 1 T1 9 T2 48 T3 4
valid_sources[0x4c] 1495324 1 T2 69 T3 5 T12 3092
valid_sources[0x4d] 1340972 1 T1 20 T2 71 T3 5
valid_sources[0x4e] 1324533 1 T2 60 T3 4 T12 3987
valid_sources[0x4f] 1401502 1 T1 46 T2 55 T3 6
valid_sources[0x50] 1415355 1 T1 7 T2 70 T3 4
valid_sources[0x51] 1335029 1 T2 58 T3 9 T12 3192
valid_sources[0x52] 1330706 1 T2 81 T3 5 T12 3890
valid_sources[0x53] 1323478 1 T1 14 T2 54 T3 7
valid_sources[0x54] 3362484 1 T1 20 T2 70 T3 6
valid_sources[0x55] 1437927 1 T1 11 T2 63 T3 5
valid_sources[0x56] 1998318 1 T1 2 T2 63 T3 6
valid_sources[0x57] 1358955 1 T2 46 T3 5 T12 3491
valid_sources[0x58] 3360873 1 T1 10 T2 68 T3 6
valid_sources[0x59] 1331692 1 T1 8 T2 46 T3 8
valid_sources[0x5a] 1553189 1 T1 5 T2 67 T3 4
valid_sources[0x5b] 1349440 1 T2 53 T3 5 T12 3522
valid_sources[0x5c] 4321015 1 T1 4 T2 55 T3 7
valid_sources[0x5d] 1329118 1 T1 22 T2 52 T3 1
valid_sources[0x5e] 1339993 1 T1 4 T2 59 T3 2
valid_sources[0x5f] 1337280 1 T2 51 T3 3 T12 3257
valid_sources[0x60] 3573540 1 T2 46 T3 1 T12 4109
valid_sources[0x61] 1329378 1 T2 49 T3 11 T12 3120
valid_sources[0x62] 1367245 1 T2 46 T3 4 T12 3314
valid_sources[0x63] 1327563 1 T1 17 T2 56 T3 6
valid_sources[0x64] 1355497 1 T1 7 T2 51 T3 7
valid_sources[0x65] 3507277 1 T1 5 T2 48 T3 9
valid_sources[0x66] 1332809 1 T1 2 T2 60 T3 4
valid_sources[0x67] 1355735 1 T1 1 T2 49 T3 7
valid_sources[0x68] 3461941 1 T1 3 T2 55 T3 5
valid_sources[0x69] 1339709 1 T1 6 T2 46 T3 6
valid_sources[0x6a] 1507506 1 T1 20 T2 61 T3 1
valid_sources[0x6b] 1457649 1 T1 27 T2 71 T3 2
valid_sources[0x6c] 1332213 1 T2 48 T3 6 T12 3107
valid_sources[0x6d] 2236424 1 T1 23 T2 59 T3 6
valid_sources[0x6e] 1971501 1 T1 1 T2 45 T3 6
valid_sources[0x6f] 3739164 1 T1 1 T2 55 T3 6
valid_sources[0x70] 1338902 1 T1 49 T2 56 T3 6
valid_sources[0x71] 2289911 1 T2 70 T3 6 T12 4183
valid_sources[0x72] 1589642 1 T1 1 T2 53 T3 5
valid_sources[0x73] 2254810 1 T1 16 T2 58 T3 9
valid_sources[0x74] 1335071 1 T2 66 T3 6 T12 3969
valid_sources[0x75] 1334541 1 T1 18 T2 42 T3 5
valid_sources[0x76] 1392148 1 T1 13 T2 50 T3 10
valid_sources[0x77] 1337230 1 T2 58 T3 5 T12 3284
valid_sources[0x78] 1996472 1 T1 10 T2 70 T3 2
valid_sources[0x79] 1328283 1 T1 1 T2 52 T3 1
valid_sources[0x7a] 1333413 1 T1 2 T2 46 T3 8
valid_sources[0x7b] 1338100 1 T1 3 T2 51 T3 6
valid_sources[0x7c] 1329778 1 T1 7 T2 59 T3 4
valid_sources[0x7d] 1330725 1 T1 20 T2 35 T3 8
valid_sources[0x7e] 1333023 1 T1 2 T2 65 T3 8
valid_sources[0x7f] 1610964 1 T1 6 T2 65 T3 5
valid_sources[0x80] 2286121 1 T1 5 T2 56 T3 6



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 86147148 1 T1 680 T2 12108 T3 9198
values[0x0] all_enables biggest_size 59730727 1 T1 392 T2 1047 T3 1895
values[0x1] all_enables biggest_size 51181635 1 T1 339 T2 1013 T3 1655

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%