Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
351599 |
1 |
|
|
T3 |
4964 |
|
T17 |
99 |
|
T26 |
1852 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
183946 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
123878 |
1 |
|
|
T3 |
152 |
|
T17 |
98 |
|
T26 |
1825 |
seven_bytes |
6219 |
1 |
|
|
T3 |
132 |
|
T28 |
159 |
|
T43 |
50 |
six_bytes |
6270 |
1 |
|
|
T3 |
139 |
|
T28 |
192 |
|
T43 |
54 |
five_bytes |
6210 |
1 |
|
|
T3 |
120 |
|
T28 |
189 |
|
T43 |
46 |
four_bytes |
6147 |
1 |
|
|
T3 |
124 |
|
T28 |
177 |
|
T43 |
57 |
three_bytes |
6416 |
1 |
|
|
T3 |
120 |
|
T28 |
227 |
|
T43 |
40 |
two_bytes |
6234 |
1 |
|
|
T3 |
131 |
|
T28 |
177 |
|
T43 |
41 |
one_byte |
6279 |
1 |
|
|
T3 |
139 |
|
T28 |
200 |
|
T43 |
50 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
344900 |
1 |
|
|
T3 |
4908 |
|
T17 |
97 |
|
T26 |
1798 |
auto[1] |
6699 |
1 |
|
|
T3 |
56 |
|
T17 |
2 |
|
T26 |
54 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
351599 |
1 |
|
|
T3 |
4964 |
|
T17 |
99 |
|
T26 |
1852 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
351580 |
1 |
|
|
T3 |
4964 |
|
T17 |
99 |
|
T26 |
1852 |
auto[1] |
19 |
1 |
|
|
T27 |
1 |
|
T28 |
1 |
|
T40 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2321 |
1 |
|
|
T3 |
9 |
|
T17 |
1 |
|
T26 |
27 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6699 |
1 |
|
|
T3 |
56 |
|
T17 |
2 |
|
T26 |
54 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
180675 |
1 |
|
|
T2 |
77 |
|
T3 |
2746 |
|
T26 |
1312 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
93354 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
65116 |
1 |
|
|
T2 |
76 |
|
T3 |
90 |
|
T26 |
1295 |
seven_bytes |
3132 |
1 |
|
|
T3 |
81 |
|
T28 |
62 |
|
T43 |
14 |
six_bytes |
3130 |
1 |
|
|
T3 |
86 |
|
T28 |
65 |
|
T43 |
15 |
five_bytes |
3212 |
1 |
|
|
T3 |
76 |
|
T28 |
66 |
|
T43 |
18 |
four_bytes |
3300 |
1 |
|
|
T3 |
80 |
|
T28 |
56 |
|
T43 |
8 |
three_bytes |
3104 |
1 |
|
|
T3 |
69 |
|
T28 |
62 |
|
T43 |
7 |
two_bytes |
3123 |
1 |
|
|
T3 |
66 |
|
T28 |
51 |
|
T43 |
9 |
one_byte |
3204 |
1 |
|
|
T3 |
70 |
|
T28 |
63 |
|
T43 |
11 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
177201 |
1 |
|
|
T2 |
75 |
|
T3 |
2708 |
|
T26 |
1278 |
auto[1] |
3474 |
1 |
|
|
T2 |
2 |
|
T3 |
38 |
|
T26 |
34 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
180675 |
1 |
|
|
T2 |
77 |
|
T3 |
2746 |
|
T26 |
1312 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
180659 |
1 |
|
|
T2 |
77 |
|
T3 |
2746 |
|
T26 |
1312 |
auto[1] |
16 |
1 |
|
|
T27 |
1 |
|
T39 |
1 |
|
T28 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1200 |
1 |
|
|
T2 |
1 |
|
T3 |
9 |
|
T26 |
17 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3474 |
1 |
|
|
T2 |
2 |
|
T3 |
38 |
|
T26 |
34 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
176753 |
1 |
|
|
T3 |
3825 |
|
T26 |
924 |
|
T27 |
2779 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
91718 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
63457 |
1 |
|
|
T3 |
101 |
|
T26 |
910 |
|
T27 |
2737 |
seven_bytes |
3081 |
1 |
|
|
T3 |
125 |
|
T28 |
26 |
|
T43 |
36 |
six_bytes |
3089 |
1 |
|
|
T3 |
122 |
|
T28 |
18 |
|
T43 |
38 |
five_bytes |
3133 |
1 |
|
|
T3 |
103 |
|
T28 |
19 |
|
T43 |
43 |
four_bytes |
3031 |
1 |
|
|
T3 |
105 |
|
T28 |
29 |
|
T43 |
31 |
three_bytes |
3062 |
1 |
|
|
T3 |
93 |
|
T28 |
22 |
|
T43 |
37 |
two_bytes |
3086 |
1 |
|
|
T3 |
94 |
|
T28 |
26 |
|
T43 |
42 |
one_byte |
3096 |
1 |
|
|
T3 |
96 |
|
T28 |
14 |
|
T43 |
32 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
173385 |
1 |
|
|
T3 |
3787 |
|
T26 |
896 |
|
T27 |
2695 |
auto[1] |
3368 |
1 |
|
|
T3 |
38 |
|
T26 |
28 |
|
T27 |
84 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
176753 |
1 |
|
|
T3 |
3825 |
|
T26 |
924 |
|
T27 |
2779 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
176744 |
1 |
|
|
T3 |
3825 |
|
T26 |
924 |
|
T27 |
2778 |
auto[1] |
9 |
1 |
|
|
T27 |
1 |
|
T39 |
1 |
|
T80 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1173 |
1 |
|
|
T3 |
6 |
|
T26 |
14 |
|
T27 |
42 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3368 |
1 |
|
|
T3 |
38 |
|
T26 |
28 |
|
T27 |
84 |