Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 253989365 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 198057750 1 T1 27412 T2 176736 T3 84020



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 238903045 1 T1 11115 T2 206646 T3 89113
values[0x0] 102434104 1 T1 10751 T2 88730 T3 19094
values[0x1] 110709966 1 T1 10820 T2 95185 T3 20482



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 198081255 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 253965860 1 T1 28767 T2 222795 T3 93989



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1319509 1 T1 106 T2 1466 T3 30
valid_sources[0x01] 1318156 1 T1 141 T2 1553 T3 24
valid_sources[0x02] 2019991 1 T1 141 T2 1497 T3 27
valid_sources[0x03] 1324108 1 T1 107 T2 1625 T3 31
valid_sources[0x04] 1319331 1 T1 128 T2 1499 T3 23
valid_sources[0x05] 1330953 1 T1 137 T2 1561 T3 24
valid_sources[0x06] 1461368 1 T1 165 T2 1516 T3 30
valid_sources[0x07] 1385456 1 T1 131 T2 1551 T3 28
valid_sources[0x08] 1316111 1 T1 145 T2 1550 T3 23
valid_sources[0x09] 1321703 1 T1 118 T2 1585 T3 34
valid_sources[0x0a] 1318617 1 T1 118 T2 1465 T3 22
valid_sources[0x0b] 1327934 1 T1 100 T2 1537 T3 29
valid_sources[0x0c] 2689832 1 T1 138 T2 1472 T3 20
valid_sources[0x0d] 1314998 1 T1 129 T2 1446 T3 20
valid_sources[0x0e] 7149449 1 T1 146 T2 1501 T3 28
valid_sources[0x0f] 1316464 1 T1 130 T2 1525 T3 32
valid_sources[0x10] 1448268 1 T1 139 T2 1538 T3 28
valid_sources[0x11] 1446739 1 T1 137 T2 1534 T3 122037
valid_sources[0x12] 3712972 1 T1 146 T2 1561 T3 22
valid_sources[0x13] 1400880 1 T1 114 T2 1543 T3 32
valid_sources[0x14] 4314074 1 T1 119 T2 1496 T3 24
valid_sources[0x15] 1314430 1 T1 109 T2 1492 T3 20
valid_sources[0x16] 1715433 1 T1 121 T2 1546 T3 23
valid_sources[0x17] 2150058 1 T1 123 T2 1595 T3 25
valid_sources[0x18] 2184640 1 T1 134 T2 1549 T3 25
valid_sources[0x19] 1330255 1 T1 147 T2 1517 T3 25
valid_sources[0x1a] 1682698 1 T1 145 T2 1559 T3 20
valid_sources[0x1b] 1316142 1 T1 105 T2 1528 T3 19
valid_sources[0x1c] 1325573 1 T1 123 T2 1573 T3 21
valid_sources[0x1d] 1321462 1 T1 157 T2 1453 T3 19
valid_sources[0x1e] 1318863 1 T1 91 T2 1498 T3 27
valid_sources[0x1f] 1319211 1 T1 146 T2 1539 T3 32
valid_sources[0x20] 1656096 1 T1 135 T2 1525 T3 32
valid_sources[0x21] 1319825 1 T1 125 T2 1544 T3 34
valid_sources[0x22] 1322582 1 T1 144 T2 1483 T3 30
valid_sources[0x23] 1314480 1 T1 137 T2 1488 T3 30
valid_sources[0x24] 1322708 1 T1 133 T2 1491 T3 31
valid_sources[0x25] 3502322 1 T1 110 T2 1486 T3 21
valid_sources[0x26] 1411975 1 T1 124 T2 1511 T3 28
valid_sources[0x27] 1339638 1 T1 128 T2 1520 T3 17
valid_sources[0x28] 1319632 1 T1 132 T2 1520 T3 15
valid_sources[0x29] 1377253 1 T1 97 T2 1547 T3 30
valid_sources[0x2a] 1971613 1 T1 126 T2 1523 T3 31
valid_sources[0x2b] 4104077 1 T1 138 T2 1516 T3 20
valid_sources[0x2c] 1318240 1 T1 146 T2 1527 T3 34
valid_sources[0x2d] 1319794 1 T1 133 T2 1603 T3 18
valid_sources[0x2e] 1319316 1 T1 159 T2 1509 T3 23
valid_sources[0x2f] 1324103 1 T1 107 T2 1517 T3 35
valid_sources[0x30] 1360905 1 T1 109 T2 1560 T3 26
valid_sources[0x31] 3778243 1 T1 151 T2 1504 T3 27
valid_sources[0x32] 1990182 1 T1 122 T2 1548 T3 22
valid_sources[0x33] 1325947 1 T1 167 T2 1514 T3 21
valid_sources[0x34] 1323946 1 T1 121 T2 1548 T3 26
valid_sources[0x35] 1360640 1 T1 145 T2 1481 T3 27
valid_sources[0x36] 1323773 1 T1 116 T2 1539 T3 21
valid_sources[0x37] 1811642 1 T1 118 T2 1541 T3 26
valid_sources[0x38] 2359255 1 T1 136 T2 1485 T3 20
valid_sources[0x39] 1962843 1 T1 136 T2 1525 T3 25
valid_sources[0x3a] 1797537 1 T1 134 T2 1555 T3 26
valid_sources[0x3b] 1321327 1 T1 97 T2 1486 T3 17
valid_sources[0x3c] 1318629 1 T1 149 T2 1514 T3 16
valid_sources[0x3d] 1327668 1 T1 156 T2 1542 T3 38
valid_sources[0x3e] 1331861 1 T1 113 T2 1583 T3 30
valid_sources[0x3f] 1338103 1 T1 124 T2 1527 T3 27
valid_sources[0x40] 1457625 1 T1 114 T2 1470 T3 33
valid_sources[0x41] 3578414 1 T1 100 T2 1505 T3 28
valid_sources[0x42] 1597232 1 T1 114 T2 1519 T3 25
valid_sources[0x43] 1319681 1 T1 132 T2 1575 T3 32
valid_sources[0x44] 2182376 1 T1 118 T2 1388 T3 23
valid_sources[0x45] 4517810 1 T1 122 T2 1564 T3 35
valid_sources[0x46] 3753905 1 T1 146 T2 1511 T3 28
valid_sources[0x47] 1320946 1 T1 129 T2 1498 T3 23
valid_sources[0x48] 2213525 1 T1 153 T2 1489 T3 39
valid_sources[0x49] 1325359 1 T1 160 T2 1441 T3 23
valid_sources[0x4a] 1323409 1 T1 107 T2 1490 T3 31
valid_sources[0x4b] 1327952 1 T1 146 T2 1512 T3 27
valid_sources[0x4c] 1345582 1 T1 129 T2 1457 T3 19
valid_sources[0x4d] 3737804 1 T1 118 T2 1569 T3 29
valid_sources[0x4e] 2246688 1 T1 135 T2 1513 T3 32
valid_sources[0x4f] 1375870 1 T1 113 T2 1534 T3 25
valid_sources[0x50] 1321408 1 T1 122 T2 1554 T3 18
valid_sources[0x51] 1472524 1 T1 153 T2 1524 T3 27
valid_sources[0x52] 1315879 1 T1 106 T2 1521 T3 25
valid_sources[0x53] 1321049 1 T1 157 T2 1555 T3 26
valid_sources[0x54] 1310864 1 T1 144 T2 1501 T3 31
valid_sources[0x55] 1327017 1 T1 139 T2 1593 T3 24
valid_sources[0x56] 1323722 1 T1 150 T2 1495 T3 18
valid_sources[0x57] 1399534 1 T1 137 T2 1593 T3 22
valid_sources[0x58] 1321613 1 T1 125 T2 1465 T3 30
valid_sources[0x59] 3063939 1 T1 171 T2 1494 T3 26
valid_sources[0x5a] 1582594 1 T1 120 T2 1537 T3 16
valid_sources[0x5b] 1705943 1 T1 157 T2 1565 T3 33
valid_sources[0x5c] 1317428 1 T1 134 T2 1550 T3 23
valid_sources[0x5d] 1322433 1 T1 90 T2 1582 T3 26
valid_sources[0x5e] 1408612 1 T1 122 T2 1593 T3 24
valid_sources[0x5f] 1346047 1 T1 116 T2 1506 T3 21
valid_sources[0x60] 3771294 1 T1 145 T2 1576 T3 25
valid_sources[0x61] 1330288 1 T1 155 T2 1553 T3 18
valid_sources[0x62] 1326638 1 T1 141 T2 1503 T3 29
valid_sources[0x63] 2207902 1 T1 138 T2 1532 T3 25
valid_sources[0x64] 3385688 1 T1 137 T2 1518 T3 28
valid_sources[0x65] 1323008 1 T1 120 T2 1438 T3 22
valid_sources[0x66] 1317191 1 T1 119 T2 1494 T3 30
valid_sources[0x67] 2220161 1 T1 139 T2 1546 T3 30
valid_sources[0x68] 1393680 1 T1 105 T2 1553 T3 29
valid_sources[0x69] 1327449 1 T1 143 T2 1515 T3 36
valid_sources[0x6a] 1848177 1 T1 127 T2 1543 T3 13
valid_sources[0x6b] 2096075 1 T1 124 T2 1502 T3 21
valid_sources[0x6c] 1317696 1 T1 115 T2 1520 T3 25
valid_sources[0x6d] 1342647 1 T1 141 T2 1538 T3 32
valid_sources[0x6e] 1322300 1 T1 144 T2 1539 T3 34
valid_sources[0x6f] 3339094 1 T1 167 T2 1558 T3 28
valid_sources[0x70] 1327136 1 T1 122 T2 1543 T3 21
valid_sources[0x71] 1319989 1 T1 126 T2 1450 T3 22
valid_sources[0x72] 2186579 1 T1 121 T2 1490 T3 26
valid_sources[0x73] 1432335 1 T1 125 T2 1549 T3 29
valid_sources[0x74] 2236590 1 T1 109 T2 1646 T3 22
valid_sources[0x75] 3072924 1 T1 120 T2 1566 T3 25
valid_sources[0x76] 1322325 1 T1 113 T2 1563 T3 22
valid_sources[0x77] 1314173 1 T1 119 T2 1467 T3 27
valid_sources[0x78] 2201167 1 T1 101 T2 1470 T3 18
valid_sources[0x79] 1776531 1 T1 149 T2 1488 T3 19
valid_sources[0x7a] 1318244 1 T1 108 T2 1528 T3 24
valid_sources[0x7b] 1315638 1 T1 188 T2 1495 T3 27
valid_sources[0x7c] 1313802 1 T1 137 T2 1556 T3 34
valid_sources[0x7d] 1322519 1 T1 179 T2 1449 T3 31
valid_sources[0x7e] 2423540 1 T1 131 T2 1464 T3 28
valid_sources[0x7f] 2704985 1 T1 167 T2 1525 T3 23
valid_sources[0x80] 1341489 1 T1 113 T2 1568 T3 35



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 86543084 1 T1 6187 T2 76222 T3 62312
values[0x0] all_enables biggest_size 60039258 1 T1 10616 T2 53577 T3 11600
values[0x1] all_enables biggest_size 51475408 1 T1 10609 T2 46937 T3 10108

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%