Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	254464277	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

200515242

1

T1

201327

T2

358941

T3

102873

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	240202308	1			T1	263128		T2	457915		T3	30280
values[0x0]	103245335	1			T1	111994		T2	211945		T3	39935
values[0x1]	111531876	1			T1	123546		T2	227098		T3	40320

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	198446116	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

256533403

1

T1

268249

T2

475061

T3

104858

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1326757	1			T1	2133		T2	2861		T3	455
valid_sources[0x01]	1324858	1			T1	1703		T2	3232		T3	383
valid_sources[0x02]	1416806	1			T1	1942		T2	3626		T3	503
valid_sources[0x03]	4247850	1			T1	1819		T2	4368		T3	461
valid_sources[0x04]	1327961	1			T1	1753		T2	2616		T3	482
valid_sources[0x05]	1328432	1			T1	1889		T2	2666		T3	433
valid_sources[0x06]	1489113	1			T1	2126		T2	3832		T3	429
valid_sources[0x07]	1329200	1			T1	1723		T2	3559		T3	428
valid_sources[0x08]	2248916	1			T1	1960		T2	4652		T3	492
valid_sources[0x09]	1328068	1			T1	1934		T2	4176		T3	400
valid_sources[0x0a]	1325168	1			T1	1846		T2	3321		T3	429
valid_sources[0x0b]	1328304	1			T1	1936		T2	3474		T3	427
valid_sources[0x0c]	3492529	1			T1	1827		T2	2523		T3	426
valid_sources[0x0d]	3369929	1			T1	1866		T2	2517		T3	457
valid_sources[0x0e]	3884039	1			T1	2169		T2	3509		T3	459
valid_sources[0x0f]	3757391	1			T1	2002		T2	2550		T3	483
valid_sources[0x10]	1330014	1			T1	1889		T2	3302		T3	429
valid_sources[0x11]	1486109	1			T1	2266		T2	4258		T3	464
valid_sources[0x12]	2264532	1			T1	2017		T2	4150		T3	424
valid_sources[0x13]	1329543	1			T1	1700		T2	3269		T3	444
valid_sources[0x14]	2222246	1			T1	1781		T2	3079		T3	396
valid_sources[0x15]	1796130	1			T1	1918		T2	5156		T3	455
valid_sources[0x16]	1344356	1			T1	1985		T2	5430		T3	414
valid_sources[0x17]	1356650	1			T1	2233		T2	4194		T3	404
valid_sources[0x18]	1785880	1			T1	1977		T2	3183		T3	399
valid_sources[0x19]	1707793	1			T1	2237		T2	3345		T3	496
valid_sources[0x1a]	1326514	1			T1	1934		T2	3386		T3	363
valid_sources[0x1b]	3838022	1			T1	1959		T2	3151		T3	400
valid_sources[0x1c]	1324085	1			T1	1924		T2	3098		T3	438
valid_sources[0x1d]	1836821	1			T1	1875		T2	2901		T3	399
valid_sources[0x1e]	1327752	1			T1	1861		T2	2867		T3	458
valid_sources[0x1f]	2237725	1			T1	1654		T2	3443		T3	383
valid_sources[0x20]	1322226	1			T1	2206		T2	3188		T3	444
valid_sources[0x21]	3385468	1			T1	1746		T2	3178		T3	447
valid_sources[0x22]	1551290	1			T1	1981		T2	3922		T3	432
valid_sources[0x23]	1329820	1			T1	1867		T2	3917		T3	457
valid_sources[0x24]	1326118	1			T1	1741		T2	4727		T3	470
valid_sources[0x25]	1323756	1			T1	1938		T2	2990		T3	421
valid_sources[0x26]	1327515	1			T1	2152		T2	3146		T3	449
valid_sources[0x27]	1323717	1			T1	1828		T2	3329		T3	389
valid_sources[0x28]	3761580	1			T1	1997		T2	5058		T3	456
valid_sources[0x29]	3375193	1			T1	1799		T2	3874		T3	402
valid_sources[0x2a]	2274802	1			T1	1955		T2	3866		T3	436
valid_sources[0x2b]	2197718	1			T1	1896		T2	2559		T3	403
valid_sources[0x2c]	1323475	1			T1	1913		T2	4907		T3	441
valid_sources[0x2d]	3362442	1			T1	2215		T2	3779		T3	443
valid_sources[0x2e]	1332271	1			T1	1874		T2	2496		T3	474
valid_sources[0x2f]	1329583	1			T1	2187		T2	2853		T3	409
valid_sources[0x30]	1424722	1			T1	2361		T2	4630		T3	389
valid_sources[0x31]	3723869	1			T1	1565		T2	3159		T3	479
valid_sources[0x32]	1331612	1			T1	1928		T2	2406		T3	450
valid_sources[0x33]	1982261	1			T1	2212		T2	3171		T3	435
valid_sources[0x34]	1369478	1			T1	1951		T2	2051		T3	452
valid_sources[0x35]	1328370	1			T1	2096		T2	3627		T3	455
valid_sources[0x36]	1827492	1			T1	2183		T2	3878		T3	405
valid_sources[0x37]	1324575	1			T1	2308		T2	4492		T3	480
valid_sources[0x38]	2535390	1			T1	2012		T2	3788		T3	488
valid_sources[0x39]	1472588	1			T1	1951		T2	2311		T3	436
valid_sources[0x3a]	1331980	1			T1	1859		T2	2666		T3	403
valid_sources[0x3b]	2251905	1			T1	1854		T2	3351		T3	431
valid_sources[0x3c]	2277566	1			T1	2130		T2	3131		T3	392
valid_sources[0x3d]	2264732	1			T1	1775		T2	4833		T3	453
valid_sources[0x3e]	1466697	1			T1	1785		T2	2933		T3	460
valid_sources[0x3f]	1322770	1			T1	1955		T2	3122		T3	440
valid_sources[0x40]	1472455	1			T1	2122		T2	3553		T3	394
valid_sources[0x41]	1325458	1			T1	2103		T2	3940		T3	385
valid_sources[0x42]	1325418	1			T1	1824		T2	3154		T3	409
valid_sources[0x43]	2184352	1			T1	2131		T2	3859		T3	437
valid_sources[0x44]	1400524	1			T1	1627		T2	3287		T3	397
valid_sources[0x45]	1387184	1			T1	1874		T2	3304		T3	399
valid_sources[0x46]	1330164	1			T1	1941		T2	5581		T3	412
valid_sources[0x47]	1321102	1			T1	1996		T2	3428		T3	441
valid_sources[0x48]	2520683	1			T1	1848		T2	3144		T3	420
valid_sources[0x49]	1799853	1			T1	1911		T2	2860		T3	461
valid_sources[0x4a]	1392002	1			T1	2151		T2	4058		T3	480
valid_sources[0x4b]	1331589	1			T1	1896		T2	4803		T3	394
valid_sources[0x4c]	1321857	1			T1	1781		T2	2001		T3	386
valid_sources[0x4d]	1327098	1			T1	1998		T2	3222		T3	381
valid_sources[0x4e]	3729185	1			T1	1920		T2	3054		T3	408
valid_sources[0x4f]	1324245	1			T1	1820		T2	4202		T3	399
valid_sources[0x50]	1326031	1			T1	1944		T2	2968		T3	402
valid_sources[0x51]	1326572	1			T1	1692		T2	2836		T3	457
valid_sources[0x52]	3350881	1			T1	1777		T2	4109		T3	422
valid_sources[0x53]	1422536	1			T1	2001		T2	4442		T3	474
valid_sources[0x54]	1324057	1			T1	1808		T2	3029		T3	396
valid_sources[0x55]	1330703	1			T1	1992		T2	4578		T3	406
valid_sources[0x56]	1328681	1			T1	1893		T2	5304		T3	423
valid_sources[0x57]	1330391	1			T1	1876		T2	2787		T3	465
valid_sources[0x58]	1330459	1			T1	2016		T2	3855		T3	416
valid_sources[0x59]	1564517	1			T1	1794		T2	2948		T3	418
valid_sources[0x5a]	2188361	1			T1	1918		T2	3830		T3	398
valid_sources[0x5b]	1333354	1			T1	2050		T2	4662		T3	488
valid_sources[0x5c]	1319670	1			T1	2029		T2	2801		T3	414
valid_sources[0x5d]	2493900	1			T1	1984		T2	3547		T3	443
valid_sources[0x5e]	1334159	1			T1	1773		T2	3105		T3	394
valid_sources[0x5f]	3371127	1			T1	2074		T2	2603		T3	386
valid_sources[0x60]	1633932	1			T1	1993		T2	2988		T3	463
valid_sources[0x61]	2350494	1			T1	1855		T2	3096		T3	356
valid_sources[0x62]	2340394	1			T1	2022		T2	4548		T3	412
valid_sources[0x63]	1320827	1			T1	1870		T2	4688		T3	445
valid_sources[0x64]	1326629	1			T1	2038		T2	1734		T3	397
valid_sources[0x65]	1845901	1			T1	2067		T2	4007		T3	424
valid_sources[0x66]	3335431	1			T1	1878		T2	3225		T3	437
valid_sources[0x67]	1984495	1			T1	2078		T2	4210		T3	415
valid_sources[0x68]	3896187	1			T1	2160		T2	4147		T3	506
valid_sources[0x69]	3476199	1			T1	2015		T2	3586		T3	444
valid_sources[0x6a]	1331245	1			T1	2092		T2	5040		T3	440
valid_sources[0x6b]	1327649	1			T1	2276		T2	2964		T3	386
valid_sources[0x6c]	2298591	1			T1	1707		T2	2716		T3	448
valid_sources[0x6d]	1386906	1			T1	1814		T2	3243		T3	473
valid_sources[0x6e]	2930223	1			T1	1743		T2	3338		T3	483
valid_sources[0x6f]	1328853	1			T1	1973		T2	3019		T3	423
valid_sources[0x70]	1333790	1			T1	1976		T2	3827		T3	438
valid_sources[0x71]	1326007	1			T1	2166		T2	2451		T3	462
valid_sources[0x72]	3258069	1			T1	1955		T2	3256		T3	444
valid_sources[0x73]	1326211	1			T1	1829		T2	4528		T3	442
valid_sources[0x74]	2000444	1			T1	1777		T2	2897		T3	472
valid_sources[0x75]	1328428	1			T1	1779		T2	3330		T3	451
valid_sources[0x76]	1428537	1			T1	2085		T2	4408		T3	409
valid_sources[0x77]	4313480	1			T1	2227		T2	3101		T3	395
valid_sources[0x78]	2225339	1			T1	2346		T2	2908		T3	424
valid_sources[0x79]	2236049	1			T1	1967		T2	4630		T3	448
valid_sources[0x7a]	1331580	1			T1	1918		T2	4962		T3	436
valid_sources[0x7b]	1329402	1			T1	1724		T2	3918		T3	489
valid_sources[0x7c]	1321860	1			T1	2251		T2	3051		T3	404
valid_sources[0x7d]	1325149	1			T1	1755		T2	2998		T3	428
valid_sources[0x7e]	1332635	1			T1	2051		T2	3044		T3	449
valid_sources[0x7f]	1328911	1			T1	1957		T2	2889		T3	469
valid_sources[0x80]	1392914	1			T1	1894		T2	3667		T3	439

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

87526494

1

T1

88305

T2

131440

T3

23830

values[0x0]

all_enables

biggest_size

60792173

1

T1

61439

T2

123082

T3

39390

values[0x1]

all_enables

biggest_size

52196575

1

T1

51583

T2

104419

T3

39653