Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
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Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 252253666 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 196556114 1 T1 726 T2 27103 T3 158654



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 236866771 1 T1 164 T2 21397 T3 182437
values[0x0] 101814072 1 T1 375 T2 4873 T3 62778
values[0x1] 110128937 1 T1 362 T2 5085 T3 67614



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 196656268 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 252153512 1 T1 778 T2 28209 T3 192740



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1238573 1 T2 3 T3 1213 T13 494
valid_sources[0x01] 3658802 1 T1 20 T3 1159 T13 448
valid_sources[0x02] 1235881 1 T2 1 T3 1220 T13 460
valid_sources[0x03] 1241343 1 T2 3 T3 1207 T13 453
valid_sources[0x04] 1236911 1 T1 9 T3 1209 T13 437
valid_sources[0x05] 1245152 1 T2 2 T3 1148 T13 461
valid_sources[0x06] 4487309 1 T1 5 T3 1261 T13 377
valid_sources[0x07] 1294480 1 T1 1 T3 1238 T13 469
valid_sources[0x08] 1239434 1 T1 9 T2 1 T3 1227
valid_sources[0x09] 3299967 1 T3 1208 T13 462 T14 7
valid_sources[0x0a] 1236736 1 T1 5 T3 1230 T13 473
valid_sources[0x0b] 1239682 1 T1 5 T2 1 T3 1134
valid_sources[0x0c] 5761444 1 T3 1193 T13 471 T14 2
valid_sources[0x0d] 1234329 1 T3 1180 T13 416 T14 7
valid_sources[0x0e] 3665004 1 T1 10 T2 1 T3 1197
valid_sources[0x0f] 1750513 1 T1 2 T2 1 T3 1241
valid_sources[0x10] 1236310 1 T2 1 T3 1220 T13 476
valid_sources[0x11] 1237180 1 T2 1 T3 1204 T13 446
valid_sources[0x12] 1239474 1 T1 2 T2 1 T3 1216
valid_sources[0x13] 1236361 1 T1 4 T2 2 T3 1215
valid_sources[0x14] 3670263 1 T1 9 T2 1 T3 1249
valid_sources[0x15] 3290364 1 T2 1 T3 1236 T13 461
valid_sources[0x16] 1235023 1 T1 7 T3 1174 T13 518
valid_sources[0x17] 2112454 1 T1 8 T3 1218 T13 424
valid_sources[0x18] 1238587 1 T1 1 T2 1 T3 1256
valid_sources[0x19] 1238640 1 T1 2 T3 1249 T13 389
valid_sources[0x1a] 1242896 1 T1 5 T2 4 T3 1241
valid_sources[0x1b] 1234984 1 T1 1 T2 2 T3 1206
valid_sources[0x1c] 2271212 1 T1 1 T2 1 T3 1226
valid_sources[0x1d] 2833711 1 T1 5 T3 1301 T13 461
valid_sources[0x1e] 1240003 1 T1 3 T2 1 T3 1155
valid_sources[0x1f] 3236689 1 T3 1260 T13 490 T14 8
valid_sources[0x20] 1235795 1 T2 1 T3 1187 T13 369
valid_sources[0x21] 2170477 1 T2 1 T3 1242 T13 454
valid_sources[0x22] 1235897 1 T2 4 T3 1239 T13 401
valid_sources[0x23] 4316021 1 T1 10 T3 1192 T13 436
valid_sources[0x24] 1233691 1 T1 10 T3 1279 T13 459
valid_sources[0x25] 1241494 1 T1 1 T2 2 T3 1172
valid_sources[0x26] 1236847 1 T2 2 T3 1305 T13 488
valid_sources[0x27] 1564629 1 T1 2 T2 1 T3 1243
valid_sources[0x28] 1246706 1 T1 8 T2 1 T3 1173
valid_sources[0x29] 2175359 1 T2 4 T3 1250 T13 453
valid_sources[0x2a] 1896162 1 T2 2 T3 1266 T13 448
valid_sources[0x2b] 3681942 1 T1 6 T3 1245 T13 474
valid_sources[0x2c] 3651512 1 T1 6 T2 1 T3 1216
valid_sources[0x2d] 3686575 1 T1 6 T3 1175 T13 431
valid_sources[0x2e] 1237082 1 T1 3 T2 1 T3 1276
valid_sources[0x2f] 1246006 1 T1 5 T2 1 T3 1146
valid_sources[0x30] 1274598 1 T3 1194 T13 500 T14 7
valid_sources[0x31] 1243920 1 T1 4 T3 1228 T13 464
valid_sources[0x32] 1236332 1 T1 2 T3 1230 T13 425
valid_sources[0x33] 3656417 1 T1 2 T3 1212 T13 478
valid_sources[0x34] 1263549 1 T1 4 T2 2 T3 1198
valid_sources[0x35] 1236608 1 T1 2 T2 1 T3 1197
valid_sources[0x36] 1232489 1 T2 1 T3 1275 T13 456
valid_sources[0x37] 1240867 1 T1 1 T3 1203 T13 460
valid_sources[0x38] 1284876 1 T3 1177 T13 416 T14 9
valid_sources[0x39] 2138131 1 T1 5 T2 3 T3 1203
valid_sources[0x3a] 1239829 1 T3 1255 T13 470 T14 16
valid_sources[0x3b] 1916400 1 T1 3 T2 2 T3 1234
valid_sources[0x3c] 1230518 1 T1 2 T3 1218 T13 476
valid_sources[0x3d] 3721599 1 T1 7 T2 3 T3 1183
valid_sources[0x3e] 1234073 1 T2 2 T3 1232 T13 461
valid_sources[0x3f] 1241141 1 T2 1 T3 1243 T13 474
valid_sources[0x40] 1237504 1 T1 19 T3 1215 T13 449
valid_sources[0x41] 2142714 1 T1 1 T3 1227 T13 503
valid_sources[0x42] 1241575 1 T1 5 T2 4 T3 1226
valid_sources[0x43] 2463381 1 T2 2 T3 1223 T13 458
valid_sources[0x44] 1235652 1 T1 10 T2 2 T3 1227
valid_sources[0x45] 2191661 1 T3 1190 T13 469 T14 9
valid_sources[0x46] 1233750 1 T1 1 T2 1 T3 1235
valid_sources[0x47] 2168711 1 T1 5 T2 2 T3 1202
valid_sources[0x48] 1855412 1 T2 2 T3 1232 T13 424
valid_sources[0x49] 1322916 1 T1 1 T2 1 T3 1217
valid_sources[0x4a] 2123595 1 T2 1 T3 1217 T13 437
valid_sources[0x4b] 1715431 1 T2 2 T3 1188 T13 450
valid_sources[0x4c] 1237773 1 T1 3 T2 1 T3 1249
valid_sources[0x4d] 4747284 1 T1 3 T3 1219 T13 485
valid_sources[0x4e] 1238612 1 T1 7 T2 2 T3 1290
valid_sources[0x4f] 1241778 1 T1 10 T2 3 T3 1177
valid_sources[0x50] 2363333 1 T1 7 T2 2 T3 1220
valid_sources[0x51] 3275567 1 T1 3 T2 1 T3 1177
valid_sources[0x52] 1238041 1 T2 3 T3 1212 T13 455
valid_sources[0x53] 1230704 1 T2 1 T3 1246 T13 440
valid_sources[0x54] 1890530 1 T2 1 T3 1281 T13 420
valid_sources[0x55] 2104754 1 T2 1 T3 1236 T13 463
valid_sources[0x56] 1238093 1 T1 1 T3 1223 T13 449
valid_sources[0x57] 1250092 1 T1 2 T2 1 T3 1208
valid_sources[0x58] 1231995 1 T2 2 T3 1205 T13 423
valid_sources[0x59] 1339948 1 T3 1125 T13 433 T14 2
valid_sources[0x5a] 1898887 1 T3 1223 T13 464 T14 5
valid_sources[0x5b] 1234448 1 T2 4 T3 1202 T13 443
valid_sources[0x5c] 1239831 1 T1 7 T2 2 T3 1260
valid_sources[0x5d] 2153506 1 T1 4 T2 3 T3 1260
valid_sources[0x5e] 1234145 1 T1 5 T3 1222 T13 475
valid_sources[0x5f] 1244854 1 T1 8 T3 1177 T13 410
valid_sources[0x60] 1238792 1 T1 3 T2 1 T3 1207
valid_sources[0x61] 1233614 1 T2 2 T3 1202 T13 450
valid_sources[0x62] 1239315 1 T1 2 T2 2 T3 1270
valid_sources[0x63] 1444058 1 T1 18 T2 1 T3 1269
valid_sources[0x64] 1238552 1 T1 10 T2 1 T3 1167
valid_sources[0x65] 1236063 1 T1 14 T3 1177 T13 432
valid_sources[0x66] 1789536 1 T3 1276 T13 494 T14 6
valid_sources[0x67] 1231502 1 T3 1212 T13 465 T14 6
valid_sources[0x68] 1302589 1 T1 11 T3 1196 T13 413
valid_sources[0x69] 1235058 1 T1 2 T3 1282 T13 477
valid_sources[0x6a] 1239679 1 T1 2 T3 1246 T13 472
valid_sources[0x6b] 1247338 1 T1 7 T3 1205 T13 487
valid_sources[0x6c] 1239878 1 T1 4 T2 1 T3 1222
valid_sources[0x6d] 3683285 1 T1 3 T2 3 T3 1217
valid_sources[0x6e] 2119894 1 T3 1219 T13 445 T14 21
valid_sources[0x6f] 1241642 1 T1 6 T2 2 T3 1184
valid_sources[0x70] 1255837 1 T1 12 T2 2 T3 1229
valid_sources[0x71] 1886895 1 T1 12 T2 3 T3 1257
valid_sources[0x72] 1234976 1 T3 1176 T13 516 T14 12
valid_sources[0x73] 1262851 1 T1 3 T2 2 T3 1167
valid_sources[0x74] 1240237 1 T1 4 T2 1 T3 1186
valid_sources[0x75] 1242109 1 T2 1 T3 1286 T13 461
valid_sources[0x76] 1234689 1 T1 11 T3 1289 T13 421
valid_sources[0x77] 1237419 1 T2 2 T3 1184 T13 473
valid_sources[0x78] 1337788 1 T1 5 T2 1 T3 1161
valid_sources[0x79] 1361307 1 T1 15 T2 1 T3 1227
valid_sources[0x7a] 1595432 1 T1 4 T2 2 T3 1244
valid_sources[0x7b] 1382106 1 T3 1178 T13 504 T14 15
valid_sources[0x7c] 1232296 1 T1 2 T2 5 T3 1207
valid_sources[0x7d] 3651180 1 T2 1 T3 1265 T13 428
valid_sources[0x7e] 1243414 1 T1 5 T3 1225 T13 431
valid_sources[0x7f] 1260528 1 T1 4 T2 1 T3 1159
valid_sources[0x80] 1234719 1 T3 1248 T13 480 T14 6



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 85691016 1 T1 30 T2 19031 T3 90022
values[0x0] all_enables biggest_size 59694300 1 T1 355 T2 4022 T3 36971
values[0x1] all_enables biggest_size 51170798 1 T1 341 T2 4050 T3 31661

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%