Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
332544 |
1 |
|
|
T1 |
769 |
|
T3 |
1197 |
|
T14 |
138 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
171844 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
120127 |
1 |
|
|
T1 |
756 |
|
T3 |
31 |
|
T14 |
136 |
seven_bytes |
5975 |
1 |
|
|
T3 |
35 |
|
T27 |
32 |
|
T22 |
40 |
six_bytes |
5944 |
1 |
|
|
T3 |
36 |
|
T27 |
27 |
|
T22 |
37 |
five_bytes |
5779 |
1 |
|
|
T3 |
29 |
|
T27 |
30 |
|
T22 |
45 |
four_bytes |
5729 |
1 |
|
|
T3 |
35 |
|
T27 |
25 |
|
T22 |
31 |
three_bytes |
5679 |
1 |
|
|
T3 |
27 |
|
T27 |
30 |
|
T22 |
41 |
two_bytes |
5833 |
1 |
|
|
T3 |
32 |
|
T27 |
19 |
|
T22 |
45 |
one_byte |
5634 |
1 |
|
|
T3 |
28 |
|
T27 |
32 |
|
T22 |
31 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
326086 |
1 |
|
|
T1 |
743 |
|
T3 |
1181 |
|
T14 |
134 |
auto[1] |
6458 |
1 |
|
|
T1 |
26 |
|
T3 |
16 |
|
T14 |
4 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
332544 |
1 |
|
|
T1 |
769 |
|
T3 |
1197 |
|
T14 |
138 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
332518 |
1 |
|
|
T1 |
768 |
|
T3 |
1197 |
|
T14 |
138 |
auto[1] |
26 |
1 |
|
|
T1 |
1 |
|
T25 |
1 |
|
T76 |
2 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2267 |
1 |
|
|
T1 |
13 |
|
T3 |
3 |
|
T14 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6458 |
1 |
|
|
T1 |
26 |
|
T3 |
16 |
|
T14 |
4 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
178504 |
1 |
|
|
T1 |
699 |
|
T3 |
530 |
|
T14 |
33 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
94837 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
61384 |
1 |
|
|
T1 |
689 |
|
T3 |
14 |
|
T14 |
32 |
seven_bytes |
3219 |
1 |
|
|
T3 |
12 |
|
T27 |
2 |
|
T22 |
10 |
six_bytes |
3255 |
1 |
|
|
T3 |
15 |
|
T27 |
5 |
|
T22 |
6 |
five_bytes |
3206 |
1 |
|
|
T3 |
5 |
|
T27 |
2 |
|
T22 |
6 |
four_bytes |
3201 |
1 |
|
|
T3 |
14 |
|
T27 |
4 |
|
T22 |
5 |
three_bytes |
3164 |
1 |
|
|
T3 |
16 |
|
T27 |
6 |
|
T22 |
2 |
two_bytes |
3052 |
1 |
|
|
T3 |
17 |
|
T27 |
8 |
|
T22 |
6 |
one_byte |
3186 |
1 |
|
|
T3 |
18 |
|
T27 |
5 |
|
T22 |
8 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
175108 |
1 |
|
|
T1 |
679 |
|
T3 |
520 |
|
T14 |
31 |
auto[1] |
3396 |
1 |
|
|
T1 |
20 |
|
T3 |
10 |
|
T14 |
2 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
178504 |
1 |
|
|
T1 |
699 |
|
T3 |
530 |
|
T14 |
33 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
178494 |
1 |
|
|
T1 |
699 |
|
T3 |
530 |
|
T14 |
33 |
auto[1] |
10 |
1 |
|
|
T24 |
2 |
|
T26 |
1 |
|
T134 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1158 |
1 |
|
|
T1 |
10 |
|
T3 |
4 |
|
T14 |
1 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3396 |
1 |
|
|
T1 |
20 |
|
T3 |
10 |
|
T14 |
2 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174905 |
1 |
|
|
T1 |
234 |
|
T3 |
557 |
|
T14 |
160 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
89101 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
64535 |
1 |
|
|
T1 |
231 |
|
T3 |
15 |
|
T14 |
157 |
seven_bytes |
3045 |
1 |
|
|
T3 |
14 |
|
T27 |
11 |
|
T22 |
3 |
six_bytes |
2969 |
1 |
|
|
T3 |
12 |
|
T27 |
11 |
|
T22 |
2 |
five_bytes |
3089 |
1 |
|
|
T3 |
14 |
|
T27 |
13 |
|
T22 |
4 |
four_bytes |
2976 |
1 |
|
|
T3 |
17 |
|
T27 |
16 |
|
T22 |
3 |
three_bytes |
3028 |
1 |
|
|
T3 |
18 |
|
T27 |
14 |
|
T22 |
3 |
two_bytes |
3064 |
1 |
|
|
T3 |
21 |
|
T27 |
12 |
|
T22 |
3 |
one_byte |
3098 |
1 |
|
|
T3 |
16 |
|
T27 |
10 |
|
T22 |
3 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
171489 |
1 |
|
|
T1 |
228 |
|
T3 |
549 |
|
T14 |
154 |
auto[1] |
3416 |
1 |
|
|
T1 |
6 |
|
T3 |
8 |
|
T14 |
6 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174905 |
1 |
|
|
T1 |
234 |
|
T3 |
557 |
|
T14 |
160 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174895 |
1 |
|
|
T1 |
234 |
|
T3 |
557 |
|
T14 |
160 |
auto[1] |
10 |
1 |
|
|
T74 |
1 |
|
T135 |
1 |
|
T136 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1217 |
1 |
|
|
T1 |
3 |
|
T3 |
3 |
|
T14 |
3 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3416 |
1 |
|
|
T1 |
6 |
|
T3 |
8 |
|
T14 |
6 |