Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	252460034	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

198595543

1

T1

2928

T2

137946

T3

1402

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	238008147	1			T1	3217		T2	42709		T3	1161
values[0x0]	102415082	1			T1	679		T2	52360		T3	507
values[0x1]	110632348	1			T1	702		T2	52459		T3	562

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	196858038	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

254197539

1

T1

3291

T2

140357

T3

1600

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1378366	1			T2	559		T3	2230		T13	572
valid_sources[0x01]	1377942	1			T2	555		T13	599		T15	30
valid_sources[0x02]	1361856	1			T1	1		T2	578		T13	581
valid_sources[0x03]	2230294	1			T2	568		T13	612		T15	34
valid_sources[0x04]	1421483	1			T1	1		T2	564		T13	583
valid_sources[0x05]	1370768	1			T1	1		T2	638		T13	642
valid_sources[0x06]	1371333	1			T1	1		T2	571		T13	605
valid_sources[0x07]	1412901	1			T1	2		T2	593		T13	574
valid_sources[0x08]	1507307	1			T1	2		T2	530		T13	520
valid_sources[0x09]	1372417	1			T1	1		T2	582		T13	561
valid_sources[0x0a]	1381754	1			T2	488		T13	532		T15	36
valid_sources[0x0b]	1826903	1			T1	1		T2	594		T13	581
valid_sources[0x0c]	1761029	1			T1	1		T2	584		T13	573
valid_sources[0x0d]	1371550	1			T2	580		T13	589		T15	39
valid_sources[0x0e]	1376246	1			T1	1		T2	599		T13	646
valid_sources[0x0f]	1371393	1			T1	1		T2	509		T13	530
valid_sources[0x10]	2410578	1			T2	640		T13	671		T15	44
valid_sources[0x11]	3243814	1			T2	600		T13	538		T15	36
valid_sources[0x12]	1370433	1			T1	1		T2	597		T13	527
valid_sources[0x13]	1371955	1			T2	621		T13	605		T15	48
valid_sources[0x14]	2292571	1			T1	1		T2	614		T13	665
valid_sources[0x15]	1373188	1			T2	651		T13	626		T15	37
valid_sources[0x16]	1376700	1			T1	1		T2	521		T13	560
valid_sources[0x17]	1375353	1			T2	537		T13	610		T15	34
valid_sources[0x18]	1378107	1			T1	1		T2	573		T13	668
valid_sources[0x19]	1376448	1			T2	531		T13	486		T15	38
valid_sources[0x1a]	1395586	1			T2	579		T13	640		T15	27
valid_sources[0x1b]	2045675	1			T2	597		T13	586		T15	48
valid_sources[0x1c]	1370805	1			T1	1		T2	588		T13	537
valid_sources[0x1d]	1624944	1			T1	1		T2	597		T13	613
valid_sources[0x1e]	1371706	1			T1	2		T2	542		T13	602
valid_sources[0x1f]	1396428	1			T1	1		T2	527		T13	557
valid_sources[0x20]	1364014	1			T2	649		T13	633		T15	29
valid_sources[0x21]	1372019	1			T1	1		T2	627		T13	487
valid_sources[0x22]	1588371	1			T1	2		T2	578		T13	510
valid_sources[0x23]	1375705	1			T1	1		T2	583		T13	596
valid_sources[0x24]	2411678	1			T2	488		T13	699		T15	34
valid_sources[0x25]	1378308	1			T2	532		T13	613		T15	34
valid_sources[0x26]	3405752	1			T1	2		T2	649		T13	563
valid_sources[0x27]	1372496	1			T1	1		T2	572		T13	619
valid_sources[0x28]	1382427	1			T2	559		T13	653		T15	47
valid_sources[0x29]	1375049	1			T2	568		T13	654		T15	34
valid_sources[0x2a]	1842765	1			T1	1		T2	636		T13	638
valid_sources[0x2b]	1373733	1			T1	1		T2	617		T13	567
valid_sources[0x2c]	1377160	1			T1	2		T2	577		T13	562
valid_sources[0x2d]	1879481	1			T1	1		T2	529		T13	642
valid_sources[0x2e]	1428015	1			T2	577		T13	711		T15	44
valid_sources[0x2f]	1368969	1			T2	518		T13	520		T15	23
valid_sources[0x30]	1397264	1			T1	1		T2	510		T13	566
valid_sources[0x31]	1377420	1			T1	1		T2	597		T13	674
valid_sources[0x32]	1408821	1			T2	586		T13	601		T15	35
valid_sources[0x33]	2258300	1			T2	554		T13	602		T15	37
valid_sources[0x34]	1373521	1			T2	603		T13	680		T15	27
valid_sources[0x35]	1490700	1			T1	1		T2	546		T13	589
valid_sources[0x36]	1523721	1			T2	539		T13	572		T15	35
valid_sources[0x37]	2788841	1			T1	1		T2	711		T13	587
valid_sources[0x38]	2300500	1			T1	1		T2	575		T13	571
valid_sources[0x39]	1496407	1			T1	2		T2	640		T13	600
valid_sources[0x3a]	1371596	1			T2	597		T13	589		T15	51
valid_sources[0x3b]	1471788	1			T2	604		T13	477		T15	29
valid_sources[0x3c]	1374474	1			T1	2		T2	602		T13	647
valid_sources[0x3d]	1444356	1			T1	1		T2	591		T13	563
valid_sources[0x3e]	1375424	1			T1	2		T2	540		T13	542
valid_sources[0x3f]	1500710	1			T2	505		T13	711		T15	29
valid_sources[0x40]	1380335	1			T1	1		T2	576		T13	563
valid_sources[0x41]	1364469	1			T2	559		T13	641		T15	27
valid_sources[0x42]	1376073	1			T2	606		T13	629		T15	34
valid_sources[0x43]	1462378	1			T2	536		T13	561		T15	29
valid_sources[0x44]	1370667	1			T1	2		T2	595		T13	604
valid_sources[0x45]	1368507	1			T1	1		T2	615		T13	510
valid_sources[0x46]	1368409	1			T2	673		T13	550		T15	35
valid_sources[0x47]	1375332	1			T2	584		T13	672		T15	29
valid_sources[0x48]	2241619	1			T2	591		T13	604		T15	52
valid_sources[0x49]	2666360	1			T1	1		T2	594		T13	583
valid_sources[0x4a]	1407455	1			T2	583		T13	611		T15	39
valid_sources[0x4b]	1387991	1			T1	1		T2	604		T13	615
valid_sources[0x4c]	1441431	1			T1	1		T2	653		T13	607
valid_sources[0x4d]	1380618	1			T1	1		T2	523		T13	581
valid_sources[0x4e]	4129224	1			T2	537		T13	633		T15	36
valid_sources[0x4f]	1369536	1			T2	662		T13	709		T15	38
valid_sources[0x50]	2339246	1			T2	566		T13	480		T15	29
valid_sources[0x51]	3848909	1			T2	532		T13	607		T15	42
valid_sources[0x52]	1374141	1			T2	635		T13	563		T15	30
valid_sources[0x53]	1372019	1			T2	583		T13	633		T15	35
valid_sources[0x54]	1365208	1			T2	565		T13	603		T15	19
valid_sources[0x55]	2253956	1			T1	1		T2	562		T13	529
valid_sources[0x56]	1964519	1			T1	1		T2	572		T13	523
valid_sources[0x57]	1379717	1			T2	555		T13	614		T15	40
valid_sources[0x58]	1518452	1			T2	523		T13	563		T15	42
valid_sources[0x59]	1374521	1			T1	1		T2	576		T13	575
valid_sources[0x5a]	1371425	1			T2	622		T13	524		T15	32
valid_sources[0x5b]	1371346	1			T1	2		T2	533		T13	490
valid_sources[0x5c]	1494898	1			T2	637		T13	634		T15	39
valid_sources[0x5d]	1380975	1			T2	530		T13	620		T15	27
valid_sources[0x5e]	1373755	1			T2	558		T13	586		T15	39
valid_sources[0x5f]	1375816	1			T1	1		T2	627		T13	675
valid_sources[0x60]	1372392	1			T2	606		T13	592		T15	31
valid_sources[0x61]	1376217	1			T1	1		T2	572		T13	579
valid_sources[0x62]	1374385	1			T1	1		T2	631		T13	664
valid_sources[0x63]	2293276	1			T2	551		T13	596		T15	30
valid_sources[0x64]	1373677	1			T1	1		T2	691		T13	550
valid_sources[0x65]	2305333	1			T1	1		T2	580		T13	562
valid_sources[0x66]	1372410	1			T1	1		T2	580		T13	591
valid_sources[0x67]	2304795	1			T1	1		T2	561		T13	601
valid_sources[0x68]	3542947	1			T1	2		T2	544		T13	587
valid_sources[0x69]	1381814	1			T2	567		T13	525		T15	27
valid_sources[0x6a]	1391838	1			T2	590		T13	538		T15	39
valid_sources[0x6b]	1381996	1			T2	533		T13	539		T15	32
valid_sources[0x6c]	1383322	1			T2	507		T13	586		T15	37
valid_sources[0x6d]	1705049	1			T2	594		T13	606		T15	30
valid_sources[0x6e]	1506599	1			T2	630		T13	586		T15	42
valid_sources[0x6f]	2041207	1			T2	627		T13	479		T15	40
valid_sources[0x70]	1947849	1			T2	569		T13	610		T15	30
valid_sources[0x71]	1368707	1			T2	522		T13	618		T15	33
valid_sources[0x72]	1379660	1			T2	469		T13	568		T15	36
valid_sources[0x73]	3327516	1			T2	607		T13	544		T15	35
valid_sources[0x74]	1369034	1			T2	527		T13	593		T15	51
valid_sources[0x75]	1379060	1			T2	545		T13	661		T15	34
valid_sources[0x76]	3812584	1			T2	581		T13	598		T15	34
valid_sources[0x77]	1374986	1			T2	498		T13	688		T15	46
valid_sources[0x78]	1375626	1			T1	1		T2	630		T13	593
valid_sources[0x79]	1369874	1			T2	509		T13	598		T15	33
valid_sources[0x7a]	1373768	1			T1	1		T2	542		T13	596
valid_sources[0x7b]	1368280	1			T2	540		T13	525		T15	34
valid_sources[0x7c]	1368163	1			T2	586		T13	604		T15	36
valid_sources[0x7d]	3479394	1			T2	495		T13	560		T15	28
valid_sources[0x7e]	1370458	1			T2	567		T13	535		T15	40
valid_sources[0x7f]	1370994	1			T2	602		T13	561		T15	39
valid_sources[0x80]	3401049	1			T1	1		T2	508		T13	522

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

86519445

1

T1

2075

T2

34848

T3

712

values[0x0]

all_enables

biggest_size

60298495

1

T1

453

T2

51632

T3

356

values[0x1]

all_enables

biggest_size

51777603

1

T1

400

T2

51466

T3

334