Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
346075 |
1 |
|
|
T2 |
2169 |
|
T4 |
157 |
|
T17 |
3990 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
187982 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
113507 |
1 |
|
|
T2 |
60 |
|
T4 |
154 |
|
T17 |
1056 |
seven_bytes |
6313 |
1 |
|
|
T2 |
62 |
|
T17 |
89 |
|
T34 |
8 |
six_bytes |
6460 |
1 |
|
|
T2 |
55 |
|
T17 |
89 |
|
T34 |
7 |
five_bytes |
6463 |
1 |
|
|
T2 |
51 |
|
T17 |
83 |
|
T34 |
8 |
four_bytes |
6547 |
1 |
|
|
T2 |
61 |
|
T17 |
87 |
|
T34 |
10 |
three_bytes |
6337 |
1 |
|
|
T2 |
55 |
|
T17 |
77 |
|
T34 |
8 |
two_bytes |
6251 |
1 |
|
|
T2 |
51 |
|
T17 |
86 |
|
T34 |
5 |
one_byte |
6215 |
1 |
|
|
T2 |
46 |
|
T17 |
83 |
|
T34 |
10 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
339589 |
1 |
|
|
T2 |
2141 |
|
T4 |
151 |
|
T17 |
3926 |
auto[1] |
6486 |
1 |
|
|
T2 |
28 |
|
T4 |
6 |
|
T17 |
64 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
346075 |
1 |
|
|
T2 |
2169 |
|
T4 |
157 |
|
T17 |
3990 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
346054 |
1 |
|
|
T2 |
2169 |
|
T4 |
157 |
|
T17 |
3990 |
auto[1] |
21 |
1 |
|
|
T55 |
2 |
|
T150 |
1 |
|
T151 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2191 |
1 |
|
|
T2 |
5 |
|
T4 |
3 |
|
T17 |
23 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6486 |
1 |
|
|
T2 |
28 |
|
T4 |
6 |
|
T17 |
64 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
175611 |
1 |
|
|
T2 |
2133 |
|
T17 |
1736 |
|
T34 |
465 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
92337 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
61512 |
1 |
|
|
T2 |
64 |
|
T17 |
627 |
|
T34 |
8 |
seven_bytes |
3117 |
1 |
|
|
T2 |
56 |
|
T17 |
30 |
|
T34 |
11 |
six_bytes |
3112 |
1 |
|
|
T2 |
70 |
|
T17 |
43 |
|
T34 |
15 |
five_bytes |
3168 |
1 |
|
|
T2 |
56 |
|
T17 |
20 |
|
T34 |
18 |
four_bytes |
3164 |
1 |
|
|
T2 |
61 |
|
T17 |
33 |
|
T34 |
14 |
three_bytes |
3106 |
1 |
|
|
T2 |
73 |
|
T17 |
27 |
|
T34 |
15 |
two_bytes |
3058 |
1 |
|
|
T2 |
44 |
|
T17 |
25 |
|
T34 |
7 |
one_byte |
3037 |
1 |
|
|
T2 |
53 |
|
T17 |
26 |
|
T34 |
11 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
172297 |
1 |
|
|
T2 |
2107 |
|
T17 |
1706 |
|
T34 |
461 |
auto[1] |
3314 |
1 |
|
|
T2 |
26 |
|
T17 |
30 |
|
T34 |
4 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
175611 |
1 |
|
|
T2 |
2133 |
|
T17 |
1736 |
|
T34 |
465 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
175603 |
1 |
|
|
T2 |
2133 |
|
T17 |
1736 |
|
T34 |
465 |
auto[1] |
8 |
1 |
|
|
T40 |
1 |
|
T152 |
1 |
|
T153 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1154 |
1 |
|
|
T2 |
2 |
|
T17 |
10 |
|
T34 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3314 |
1 |
|
|
T2 |
26 |
|
T17 |
30 |
|
T34 |
4 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
172060 |
1 |
|
|
T2 |
1097 |
|
T4 |
81 |
|
T17 |
954 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
91041 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
59335 |
1 |
|
|
T2 |
25 |
|
T4 |
79 |
|
T17 |
417 |
seven_bytes |
3141 |
1 |
|
|
T2 |
28 |
|
T17 |
9 |
|
T34 |
2 |
six_bytes |
3101 |
1 |
|
|
T2 |
39 |
|
T17 |
14 |
|
T34 |
2 |
five_bytes |
3164 |
1 |
|
|
T2 |
21 |
|
T17 |
17 |
|
T34 |
1 |
four_bytes |
3120 |
1 |
|
|
T2 |
35 |
|
T17 |
13 |
|
T34 |
1 |
three_bytes |
3061 |
1 |
|
|
T2 |
40 |
|
T17 |
11 |
|
T34 |
2 |
two_bytes |
3031 |
1 |
|
|
T2 |
31 |
|
T17 |
19 |
|
T34 |
4 |
one_byte |
3066 |
1 |
|
|
T2 |
23 |
|
T17 |
19 |
|
T22 |
28 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
168758 |
1 |
|
|
T2 |
1083 |
|
T4 |
77 |
|
T17 |
926 |
auto[1] |
3302 |
1 |
|
|
T2 |
14 |
|
T4 |
4 |
|
T17 |
28 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
172060 |
1 |
|
|
T2 |
1097 |
|
T4 |
81 |
|
T17 |
954 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
172043 |
1 |
|
|
T2 |
1097 |
|
T4 |
81 |
|
T17 |
954 |
auto[1] |
17 |
1 |
|
|
T154 |
1 |
|
T155 |
1 |
|
T156 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1120 |
1 |
|
|
T2 |
2 |
|
T4 |
2 |
|
T17 |
7 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3302 |
1 |
|
|
T2 |
14 |
|
T4 |
4 |
|
T17 |
28 |