Unified Coverage Report :: Group :: kmac_env_pkg::app_cg_wrap::app_cg

Group : kmac_env_pkg::app_cg_wrap::app_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
88.89	88.89	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

3 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
AppKeymgr_cg	88.89	1	100	1	64	64
AppLc_cg	88.89	1	100	1	64	64
AppRom_cg	88.89	1	100	1	64	64

---

Group Instance : AppKeymgr_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
88.89	1	100	1	64	64

---

Summary for Group Instance AppKeymgr_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	16	2	14	87.50
Crosses	2	0	2	100.00

Variables for Group Instance AppKeymgr_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
app_err	2	1	1	50.00	100	1	1	2
data_strb	8	0	8	100.00	100	1	1	0
done	2	0	2	100.00	100	1	1	2
in_keccak_rounds	2	1	1	50.00	100	1	1	2
single_data_beat	2	0	2	100.00	100	1	1	2

Crosses for Group Instance AppKeymgr_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
partial_data_on_last_beat	1	0	1	100.00	100	1	1	0
done_in_keccak_rounds	1	0	1	100.00	100	1	1	0

---

Group Instance : AppLc_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
88.89	1	100	1	64	64

---

Summary for Group Instance AppLc_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	16	2	14	87.50
Crosses	2	0	2	100.00

Variables for Group Instance AppLc_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
app_err	2	1	1	50.00	100	1	1	2
data_strb	8	0	8	100.00	100	1	1	0
done	2	0	2	100.00	100	1	1	2
in_keccak_rounds	2	1	1	50.00	100	1	1	2
single_data_beat	2	0	2	100.00	100	1	1	2

Crosses for Group Instance AppLc_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
partial_data_on_last_beat	1	0	1	100.00	100	1	1	0
done_in_keccak_rounds	1	0	1	100.00	100	1	1	0

---

Group Instance : AppRom_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
88.89	1	100	1	64	64

---

Summary for Group Instance AppRom_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	16	2	14	87.50
Crosses	2	0	2	100.00

Variables for Group Instance AppRom_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
app_err	2	1	1	50.00	100	1	1	2
data_strb	8	0	8	100.00	100	1	1	0
done	2	0	2	100.00	100	1	1	2
in_keccak_rounds	2	1	1	50.00	100	1	1	2
single_data_beat	2	0	2	100.00	100	1	1	2

Crosses for Group Instance AppRom_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
partial_data_on_last_beat	1	0	1	100.00	100	1	1	0
done_in_keccak_rounds	1	0	1	100.00	100	1	1	0

Summary for Variable app_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for app_err

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

345756

1

T1

89

T3

2689

T23

3079

---

Summary for Variable data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for data_strb

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	177797	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
full_data_beat	125536	1			T1	87		T3	2654		T23	141
seven_bytes	5993	1			T23	94		T29	122		T26	50
six_bytes	6127	1			T23	88		T29	93		T26	70
five_bytes	5972	1			T23	96		T29	100		T26	71
four_bytes	6127	1			T23	77		T29	106		T26	74
three_bytes	6088	1			T23	97		T29	123		T26	70
two_bytes	5981	1			T23	89		T29	92		T26	64
one_byte	6135	1			T23	63		T29	127		T26	61

---

Summary for Variable done

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for done

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

339136

1

T1

85

T3

2619

T23

3039

auto[1]

6620

1

T1

4

T3

70

T23

40

---

Summary for Variable in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for in_keccak_rounds

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

345756

1

T1

89

T3

2689

T23

3079

---

Summary for Variable single_data_beat

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for single_data_beat

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

345734

1

T1

89

T3

2689

T23

3079

auto[1]

22

1

T170

1

T116

2

T45

2

---

Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

2336

1

T1

2

T3

35

T23

6

---

Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

6620

1

T1

4

T3

70

T23

40

Summary for Variable app_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for app_err

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

183315

1

T2

2

T3

1129

T23

386

---

Summary for Variable data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for data_strb

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	97370	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
full_data_beat	63382	1			T2	2		T3	1114		T23	263
seven_bytes	3270	1			T29	103		T26	22		T24	49
six_bytes	3294	1			T23	2		T29	131		T26	25
five_bytes	3195	1			T23	7		T29	101		T26	28
four_bytes	3268	1			T23	1		T29	106		T26	26
three_bytes	3195	1			T23	2		T29	90		T26	17
two_bytes	3099	1			T23	5		T29	102		T26	28
one_byte	3242	1			T23	3		T29	105		T26	34

---

Summary for Variable done

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for done

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

179855

1

T2

2

T3

1099

T23

376

auto[1]

3460

1

T3

30

T23

10

T29

52

---

Summary for Variable in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for in_keccak_rounds

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

183315

1

T2

2

T3

1129

T23

386

---

Summary for Variable single_data_beat

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for single_data_beat

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

183299

1

T2

2

T3

1129

T23

386

auto[1]

16

1

T42

1

T81

1

T171

1

---

Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

1171

1

T3

15

T23

3

T29

8

---

Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

3460

1

T3

30

T23

10

T29

52

Summary for Variable app_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for app_err

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

181405

1

T1

295

T3

1045

T5

3

---

Summary for Variable data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for data_strb

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	93207	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
full_data_beat	65897	1			T1	292		T3	1027		T5	3
seven_bytes	3240	1			T23	18		T29	73		T26	16
six_bytes	3149	1			T23	13		T29	70		T26	12
five_bytes	3270	1			T23	22		T29	75		T26	16
four_bytes	3157	1			T23	23		T29	87		T26	15
three_bytes	3059	1			T23	20		T29	93		T26	6
two_bytes	3219	1			T23	16		T29	77		T26	21
one_byte	3207	1			T23	16		T29	76		T26	17

---

Summary for Variable done

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for done

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

177949

1

T1

289

T3

1009

T5

3

auto[1]

3456

1

T1

6

T3

36

T23

14

---

Summary for Variable in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for in_keccak_rounds

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

181405

1

T1

295

T3

1045

T5

3

---

Summary for Variable single_data_beat

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for single_data_beat

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

181392

1

T1

295

T3

1045

T5

3

auto[1]

13

1

T25

1

T80

1

T46

1

---

Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

1211

1

T1

3

T3

18

T23

4

---

Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

3456

1

T1

6

T3

36

T23

14